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Ignacio García-Vargas
Ignacio García-Vargas
Assistant Professor, University of Seville (Spain)
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Year
ROM-based finite state machine implementation in low cost FPGAs
I Garcia-Vargas, R Senhadji-Navarro, G Jiménez-Moreno, A Civit-Balcells, ...
2007 IEEE International Symposium on Industrial Electronics, 2342-2347, 2007
772007
Finite state machines with input multiplexing: A performance study
I Garcia-Vargas, R Senhadji-Navarro
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2015
422015
ROM-based FSM implementation using input multiplexing in FPGA devices
R Senhadji-Navarro, I Garcia-Vargas, G Jimenez-Moreno, A Civit-Ballcels
Electronics Letters 40 (20), 1, 2004
312004
Performance evaluation of RAM-based implementation of finite state machines in FPGAs
R Senhadji-Navarro, I Garcia-Vargas, JL Guisado
2012 19th IEEE International Conference on Electronics, Circuits, and …, 2012
222012
Synthetic generation of address-events for real-time image processing
A Linares-Barranco, R Senhadji-Navarro, I Garcia-Vargas, ...
EFTA 2003. 2003 IEEE Conference on Emerging Technologies and Factory …, 2003
122003
High-speed and area-efficient reconfigurable multiplexer bank for RAM-based finite state machine implementations
R Senhadji-Navaro, I Garcia-Vargas
Journal of Circuits, Systems and Computers 24 (07), 1550101, 2015
102015
SIRENA: A CAD environment for behavioural modelling and simulation of VLSI cellular neural network chips
R Carmona, I García‐Vargas, G Liñán, R Domínguez‐Castro, S Espejo, ...
International journal of circuit theory and applications 27 (1), 43-76, 1999
101999
High-performance architecture for binary-tree-based finite state machines
R Senhadji-Navarro, I Garcia-Vargas
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2017
92017
Finite virtual state machines
R Senhadji-Navarro, I Garcia-Vargas
IEICE Transactions on information and systems 95 (10), 2544-2547, 2012
92012
Comparison of Matroid Intersection Algorithms for Large Circuit Analysis
M Galán, I García-Vargas, FV Fernández, A Rodríguez-Vázquez
Design of Integrated Circuits and Systems Conference, 199-204, 1996
8*1996
Fpga-based implementation of ram with asymmetric port widths for run-time reconfiguration
R Senhadji-Navarro, I Garcia-Vargas, G Jimenez-Moreno, A Civit-Balcells
2007 14th IEEE International Conference on Electronics, Circuits and Systems …, 2007
62007
A new matroid intersection algorithm for symbolic large circuit analysis
M Galan, I Garciá-Vargas, FV Fernandez, A Rodriguez-Vazquez
Proc. 4th Int. Workshop on Symbolic Methods and Applications to Circuit Design, 1996
61996
Mapping arbitrary logic functions onto carry chains in FPGAs
R Senhadji-Navarro, I Garcia-Vargas
Electronics 11 (1), 27, 2021
42021
An algorithm for numerical reference generation in symbolic analysis of large analog circuits
I García-Vargas, M Galán, FV Fernández, A Rodríguez-Vázquez
Proceedings European Design and Test Conference. ED & TC 97, 395-399, 1997
41997
SIRENA: A simulation environment for CNNs
R Dominguez-Castro, S Espejo, A Rodríguez-Vázquez, I Garcia-Vargas, ...
Proceedings of the Third IEEE International Workshop on Cellular Neural …, 1994
41994
Methodology for Distributed-ROM-based Implementation of Finite State Machines
R Senhadji-Navarro, I Garcia-Vargas
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2020
32020
The minimum maximal k-partial-matching problem
I Garcia-Vargas, R Senhadji-Navarro
Optimization Letters 7, 1959-1968, 2013
22013
Minimum maximum reconfiguration cost problem
R Senhadji-Navarro, I Garcia-Vargas
Optimization Letters 10, 605-617, 2016
12016
Mapping Outputs and States Encoding Bits to Outputs Using Multiplexers in Finite State Machine Implementations
R Senhadji-Navarro, I Garcia-Vargas
Electronics 12 (3), 502, 2023
2023
Optimization based on the minimum maximal k-partial-matching problem of finite states machines with input multiplexing
I Garcia-Vargas, R Senhadji-Navarro
Design Automation for Embedded Systems 26 (2), 83-103, 2022
2022
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