Javier Resano
Javier Resano
Dirección de correo verificada de unizar.es - Página principal
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The promise of reconfigurable computing for hyperspectral imaging onboard systems: A review and trends
S Lopez, T Vladimirova, C Gonzalez, J Resano, D Mozos, A Plaza
Proceedings of the IEEE 101 (3), 698-722, 2013
892013
A hybrid prefetch scheduling heuristic to minimize at run-time the reconfiguration overhead of dynamically reconfigurable hardware [multimedia applications]
J Resano, D Mozos, F Catthoor
Design, Automation and Test in Europe, 106-111, 2005
862005
Use of FPGA or GPU-based architectures for remotely sensed hyperspectral image processing
C Gonzalez, S Sánchez, A Paz, J Resano, D Mozos, A Plaza
Integration 46 (2), 89-103, 2013
782013
FPGA implementation of the N-FINDR algorithm for remotely sensed hyperspectral image analysis
C González, D Mozos, J Resano, A Plaza
IEEE transactions on geoscience and remote sensing 50 (2), 374-388, 2011
772011
A reconfigurable manager for dynamically reconfigurable hardware
J Resano, D Mozos, D Verkest, F Catthoor
IEEE Design & Test of Computers 22 (5), 452-460, 2005
772005
FPGA implementation of the pixel purity index algorithm for remotely sensed hyperspectral image analysis
C González, J Resano, D Mozos, A Plaza, D Valencia
EURASIP Journal on Advances in Signal Processing 2010 (1), 969806, 2010
742010
FPGA implementation of abundance estimation for spectral unmixing of hyperspectral data using the image space reconstruction algorithm
C González, J Resano, A Plaza, D Mozos
IEEE Journal of Selected Topics in Applied Earth Observations and Remote …, 2011
552011
A hardware implementation of a run-time scheduler for reconfigurable systems
JA Clemente, J Resano, C González, D Mozos
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 19 (7 …, 2010
532010
Specific scheduling support to minimize the reconfiguration overhead of dynamically reconfigurable hardware
J Resano, D Mozos
Proceedings of the 41st annual Design Automation Conference, 119-124, 2004
532004
Run-time minimization of reconfiguration overhead in dynamically reconfigurable systems
J Resano, D Mozos, D Verkest, S Vernalde, F Catthoor
International Conference on Field Programmable Logic and Applications, 585-594, 2003
352003
Efficiently scheduling runtime reconfigurations
J Resano, JA Clemente, C Gonzalez, D Mozos, F Catthoor
ACM Transactions on Design Automation of Electronic Systems (TODAES) 13 (4 …, 2008
342008
A hybrid design-time/run-time scheduling flow to minimise the reconfiguration overhead of FPGAs
J Resano, D Verkest, D Mozos, S Vernalde, F Catthoor
Microprocessors and Microsystems 28 (5-6), 291-301, 2004
242004
A task graph execution manager for reconfigurable multi-tasking systems
JA Clemente, C González, J Resano, D Mozos
Microprocessors and Microsystems 34 (2-4), 73-83, 2010
212010
An approach to manage reconfigurations and reduce area cost in hard real-time reconfigurable systems
JA Clemente, J Resano, D Mozos
ACM Transactions on Embedded Computing Systems (TECS) 13 (4), 1-24, 2014
192014
A hardware task-graph scheduler for reconfigurable multi-tasking systems
JA Clemente, C González, J Resano, D Mozos
2008 International Conference on Reconfigurable Computing and FPGAs, 79-84, 2008
192008
Reducing the reconfiguration overhead: a survey of techniques.
EP Ramo, J Resano, D Mozos, F Catthoor
ERSA, 191-194, 2007
142007
Configuration mapping algorithms to reduce energy and time reconfiguration overheads in reconfigurable systems
JA Clemente, EP Ramo, J Resano, D Mozos, F Catthoor
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 22 (6 …, 2013
122013
A hardware/software partitioning and scheduling approach for embedded systems with low-power and high performance requirements
J Resano, D Mozos, E Pérez, H Mecha, J Septién
International Workshop on Power and Timing Modeling, Optimization and …, 2003
92003
FPGA for Computing the Pixel Purity Index Algorithm on Hyperspectral Images.
C González, D Mozos, J Resano, A Plaza
ERSA, 293-, 2010
82010
Memory hierarchy for high-performance and energy-aware reconfigurable systems
EP Ramo, J Resano, D Mozos, F Catthoor
IET Computers & Digital Techniques 1 (5), 565-571, 2007
82007
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Artículos 1–20