| A self-aligned gate-last process applied to All-III–V CMOS on Si A Jönsson, J Svensson, LE Wernersson IEEE Electron Device Letters 39 (7), 935-938, 2018 | 28 | 2018 |
| High-density logic-in-memory devices using vertical indium arsenide nanowires on silicon MS Ram, KM Persson, A Irish, A Jönsson, R Timm, LE Wernersson Nature Electronics 4 (12), 914-920, 2021 | 26 | 2021 |
| Improved electrostatics through digital etch schemes in vertical GaSb nanowire p-MOSFETs on Si Z Zhu, A Jonsson, YP Liu, J Svensson, R Timm, LE Wernersson ACS Applied Electronic Materials 4 (1), 531-538, 2022 | 11 | 2022 |
| Gate-length dependence of vertical GaSb nanowire p-MOSFETs on Si A Jönsson, J Svensson, E Lind, LE Wernersson IEEE Transactions on Electron Devices 67 (10), 4118-4122, 2020 | 10 | 2020 |
| Performance enhancement of GaSb vertical nanowire p-type MOSFETs on Si by rapid thermal annealing Z Zhu, J Svensson, A Jönsson, LE Wernersson Nanotechnology 33 (7), 075202, 2021 | 7 | 2021 |
| Balanced drive currents in 10–20 nm diameter nanowire All-III-V CMOS on Si A Jönsson, J Svensson, LE Wemersson 2018 IEEE International Electron Devices Meeting (IEDM), 39.3. 1-39.3. 4, 2018 | 7 | 2018 |
| Doping Profiles in Ultrathin Vertical VLS-Grown InAs Nanowire MOSFETs with High Performance A Jonsson, J Svensson, EM Fiordaliso, E Lind, M Hellenbrand, ... ACS Applied Electronic Materials 3 (12), 5240-5247, 2021 | 5 | 2021 |
| Hydrogen plasma enhanced oxide removal on GaSb planar and nanowire surfaces YP Liu, S Yngman, A Troian, G D'Acunto, A Jönsson, J Svensson, ... Applied Surface Science 593, 153336, 2022 | 4 | 2022 |
| Geometric control of diffusing elements on InAs semiconductor surfaces via metal contacts S Benter, A Jönsson, J Johansson, L Zhu, E Golias, LE Wernersson, ... Nature Communications 14 (1), 4541, 2023 | 2 | 2023 |
| Directed Self‐Assembly for Dense Vertical III–V Nanowires on Si and Implications for Gate All‐Around Deposition A Löfstrand, R Jafari Jam, J Svensson, A Jönsson, H Menon, ... Advanced Electronic Materials 8 (9), 2101388, 2022 | 2 | 2022 |
| Vertical heterostructure III-V nanowire MOSFETs A Jönsson Vertical heterostructure III-V nanowire MOSFETs, 2016 | 2 | 2016 |
| Direct observation of radio-frequency negative differential resistance in GaN-based single drift region IMPATT diodes Z Zhu, L Cao, A Jönsson, P Xu, J Xie, P Fay Applied Physics Letters 124 (17), 2024 | 1 | 2024 |
| Wet etch methods to achieve submicron active area self-aligned vertical Sb-heterostructure backward diodes A Jönsson, P Xu, J Reitemeier, PW Bohn, P Fay Materials Science in Semiconductor Processing 171, 108036, 2024 | | 2024 |
| Ferroelectric‐Gated HfZrO2/AlGaN/GaN High‐Electron‐Mobility Transistors with Regrown Contacts for Radio Frequency and Millimeter‐Wave Switch Applications A Jönsson, W Turner, H Ye, W Wu, N Venkatesan, A Xie, E Beam, Y Cao, ... physica status solidi (a), 2300654, 2024 | | 2024 |
| Integration of ferroelectrics with III-N transistors for high performance millimeter-wave applications H Ye, YE Jeng, A Jonsson, C Wu, N Venkatesan, J Wang, Y Cao, JA Xie, ... Quantum Sensing and Nano Electronics and Photonics XIX 12430, 5-8, 2023 | | 2023 |
| SEMICONDUCTOR STRUCTURE FORMING A PLURALITY OF TRANSISTORS T Tired, S Andric, A Jönsson, LE Wernersson, L Tilly EP Patent EP4,086,946, 2022 | | 2022 |
| Vertical Heterostructure III-V MOSFETs for CMOS, RF and Memory Applications A Jönsson | | 2021 |
| CMOS Integration Based on All-III-V Materials A Jönsson, J Svensson, LE Wernersson Swedish Microwave Days 2018, 2018 | | 2018 |
| Vertical, High-Performance 12 nm diameter InAs Nanowire MOSFETs on Si using an all III-V CMOS process A Jönsson, J Svensson, LE Wernersson | | 2018 |
johannes svenssonResearcher, Lund UniversityDirección de correo verificada de eit.lth.se
