| Exact and approximate algorithms for the optimization of area and delay in multiple constant multiplications L Aksoy, E Da Costa, P Flores, J Monteiro IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2008 | 168 | 2008 |
| Power-efficient sum of absolute differences hardware architecture using adder compressors for integer motion estimation design B Silveira, G Paim, B Abreu, M Grellert, CM Diniz, EAC da Costa, S Bampi IEEE Transactions on Circuits and Systems I: Regular Papers 64 (12), 3126-3137, 2017 | 72 | 2017 |
| Design methodology to explore hybrid approximate adders for energy-efficient image and video processing accelerators LB Soares, MMA da Rosa, CM Diniz, EAC da Costa, S Bampi IEEE Transactions on Circuits and Systems I: Regular Papers 66 (6), 2137-2150, 2019 | 64 | 2019 |
| Approximate pruned and truncated Haar discrete wavelet transform VLSI hardware for energy-efficient ECG signal processing HB Seidel, MMA da Rosa, G Paim, EAC da Costa, SJM Almeida, S Bampi IEEE Transactions on Circuits and Systems I: Regular Papers 68 (5), 1814-1826, 2021 | 37 | 2021 |
| A cross-layer gate-level-to-application co-simulation for design space exploration of approximate circuits in HEVC video encoders G Paim, LMG Rocha, H Amrouch, EAC da Costa, S Bampi, J Henkel IEEE Transactions on Circuits and Systems for Video Technology 30 (10), 3814 …, 2019 | 33 | 2019 |
| Power-, area-, and compression-efficient eight-point approximate 2-D discrete tchebichef transform hardware design combining truncation pruning and efficient transposition buffers G Paim, LMG Rocha, GM Santana, LB Soares, EAC da Costa, S Bampi IEEE Transactions on Circuits and Systems I: Regular Papers 66 (2), 680-693, 2018 | 24 | 2018 |
| Exploring the use of parallel prefix adder topologies into approximate adder circuits M Macedo, L Soares, B Silveira, CM Diniz, EAC da Costa 2017 24th IEEE International Conference on Electronics, Circuits and Systems …, 2017 | 24 | 2017 |
| Efficient Dedicated Multiplication Blocks for 2's Complement Radix-2m Array Multipliers. LZ Pieper, EAC da Costa, SJM de Almeida, S Bampi, JC Monteiro J. Comput. 5 (10), 1502-1509, 2010 | 21 | 2010 |
| Design of power efficient butterflies from Radix-2 DIT FFT using adder compressors with a new XOR gate topology MB Fonseca, EAC da Costa, JBS Martins Analog Integrated Circuits and Signal Processing 73, 945-954, 2012 | 19 | 2012 |
| Design of a radix-2m hybrid array multiplier using carry save adder format M Fonseca, E da Costa, S Bampi, J Monteiro Proceedings of the 18th annual symposium on Integrated circuits and system …, 2005 | 19 | 2005 |
| On the resiliency of NCFET circuits against voltage over-scaling G Paim, G Zervakis, G Pahwa, YS Chauhan, EAC da Costa, S Bampi, ... IEEE Transactions on Circuits and Systems I: Regular Papers 68 (4), 1481-1492, 2021 | 18 | 2021 |
| Motion estimation architecture using efficient adder-compressors for HDTV video coding M Porto, A Silva, S Almeida, E da Costa, S Bampi Journal of Integrated Circuits and Systems 5 (1), 78-88, 2010 | 18 | 2010 |
| Maximal sharing of partial terms in MCM under minimal signed digit representation E da Costa, P Flores, J Monteiro Proceedings of the 2005 European Conference on Circuit Theory and Design …, 2005 | 18 | 2005 |
| Axppa: Approximate parallel prefix adders MMA da Rosa, G Paim, PÜL da Costa, EAC da Costa, RI Soares, S Bampi IEEE Transactions on Very Large Scale Integration (VLSI) Systems 31 (1), 17-28, 2022 | 15 | 2022 |
| Fixed-point NLMS and IPNLMS VLSI architectures for accurate FECG and FHR processing PÜ da Costa, G Paim, LMG Rocha, EAC da Costa, SJM de Almeida, ... IEEE Transactions on Biomedical Circuits and Systems 15 (5), 898-911, 2021 | 14 | 2021 |
| Design of pipelined butterflies from Radix-2 FFT with Decimation in Time algorithm using efficient adder compressors MB Fonseca, JBS Martins, EAC da Costa 2011 IEEE Second Latin American Symposium on Circuits and Systems (LASCAS), 1-4, 2011 | 14 | 2011 |
| Avaliação da surdez ocupacional AA Silva, EA da Costa Revista da Associação Médica Brasileira 44, 65-68, 1998 | 14 | 1998 |
| Exploring NLMS-based adaptive filter hardware architectures for eliminating power line interference in EEG signals AB La Rosa, PTL Pereira, P Ücker, G Paim, EAC da Costa, S Bampi, ... Circuits, Systems, and Signal Processing 40, 3305-3337, 2021 | 13 | 2021 |
| Exploiting addition schemes for the improvement of optimized radix-2 and radix-4 fft butterflies RH Neuenfeld, MB Fonseca, EAC da Costa, JP Oses 2017 IEEE 8th Latin American Symposium on Circuits & Systems (LASCAS), 1-4, 2017 | 13 | 2017 |
| Combination of radix-2m multiplier blocks and adder compressors for the design of efficient 2's complement 64-bit array multipliers LZ Pieper, EAC da Costa, JC Monteiro 2013 26th Symposium on Integrated Circuits and Systems Design (SBCCI), 1-6, 2013 | 13 | 2013 |
