| Formal modeling and verification for network-on-chip YR Chen, WT Su, PA Hsiung, YC Lan, YH Hu, SJ Chen The 2010 International Conference on Green Circuits and Systems, 299-304, 2010 | 35 | 2010 |
| Model checking safety-critical systems using safecharts PA Hsiung, YR Chen, YH Lin IEEE Transactions on Computers 56 (5), 692-705, 2007 | 34 | 2007 |
| Unified security and safety risk assessment-a case study on nuclear power plant YR Chen, SJ Chen, PA Hsiung, IH Chou 2014 International Conference on Trustworthy Systems and Their Applications …, 2014 | 24 | 2014 |
| Model checking prioritized timed automata SW Lin, PA Hsiung, CH Huang, YR Chen Automated Technology for Verification and Analysis: Third International …, 2005 | 22 | 2005 |
| Congestion-aware scheduling for NoC-based reconfigurable systems HL Chao, YR Chen, SY Tung, PA Hsiung, SJ Chen 2012 Design, Automation & Test in Europe Conference & Exhibition (DATE …, 2012 | 19 | 2012 |
| VERTAF/Multi-Core: A SysML-based application framework for multi-core embedded software development CS Lin, CH Lu, SW Lin, YR Chen, PA Hsiung Journal of Computer Science and Technology 26, 448-462, 2011 | 17 | 2011 |
| Model-driven development of multi-core embedded software PA Hsiung, SW Lin, YR Chen, NL Hsueh, CH Chang, CH Shih, CS Koong, ... 2009 ICSE Workshop on Multicore Software Engineering, 9-16, 2009 | 14 | 2009 |
| Model checking timed systems with urgencies PA Hsiung, SW Lin, YR Chen, CH Huang, JJ Yeh, HY Sun, CS Lin, ... Automated Technology for Verification and Analysis: 4th International …, 2006 | 7 | 2006 |
| Vertaf/multi-core: A sysml-based application framework for multi-core embedded software development PA Hsiung, CS Lin, SW Lin, YR Chen, CH Lu, SY Tong, WT Su, C Shih, ... Algorithms and Architectures for Parallel Processing: 9th International …, 2009 | 5 | 2009 |
| Accelerating coverage estimation through partial model checking YR Chen, JJ Yeh, PA Hsiung, SJ Chen IEEE Transactions on Computers 63 (7), 1613-1625, 2013 | 4 | 2013 |
