| The ARM Scalable Vector Extension N Stephens, S Biles, M Boettcher, J Eapen, M Eyole, G Gabrielli, ... IEEE Micro 37 (2), 26-39, 2017 | 119 | 2017 |
| Analysis of static and dynamic energy consumption in NUCA caches: Initial results A Bardine, P Foglia, G Gabrielli, CA Prete Proceedings of the 2007 workshop on MEmory performance: DEaling with …, 2007 | 52 | 2007 |
| Leveraging data promotion for low power D-NUCA caches A Bardine, M Comparetti, P Foglia, G Gabrielli, CA Prete, P Stenström Digital System Design Architectures, Methods and Tools, 2008. DSD'08. 11th …, 2008 | 34 | 2008 |
| Way adaptable D-NUCA caches A Bardine, M Comparetti, P Foglia, G Gabrielli, C Prete International Journal of High Performance Systems Architecture 2 (3-4), 215-228, 2010 | 31 | 2010 |
| Improving power efficiency of D-NUCA caches A Bardine, P Foglia, G Gabrielli, CA Prete, P Stenström ACM SIGARCH Computer Architecture News 35 (4), 53-58, 2007 | 24 | 2007 |
| A power-efficient migration mechanism for D-NUCA caches A Bardine, M Comparetti, P Foglia, G Gabrielli, CA Prete 2009 Design, Automation & Test in Europe Conference & Exhibition, 598-601, 2009 | 23 | 2009 |
| Data processing apparatus and method for processing vector operands M Boettcher, M Eyole-monono, G Gabrielli US Patent 10,514,919, 2019 | 9 | 2019 |
| MALEC: A multiple access low energy cache M Boettcher, G Gabrielli, BM Al-Hashimi, D Kershaw 2013 Design, Automation & Test in Europe Conference & Exhibition (DATE), 368-373, 2013 | 9 | 2013 |
| Impact of on-chip network parameters on NUCA cache performances A Bardine, M Comparetti, P Foglia, G Gabrielli, CA Prete IET computers & digital techniques 3 (5), 501-512, 2009 | 9 | 2009 |
| Data processing apparatus and method for performing segmented operations M Eyole-monono, AD Reid, ML Böttcher, G Gabrielli US Patent 9,557,995, 2017 | 8 | 2017 |
| Advanced SIMD: Extending the reach of contemporary SIMD architectures M Boettcher, BM Al-Hashimi, M Eyole, G Gabrielli, A Reid 2014 Design, Automation & Test in Europe Conference & Exhibition (DATE), 1-4, 2014 | 7 | 2014 |
| Reducing sensitivity to noc latency in nuca caches P Foglia, G Gabrielli, F Panicucci, M Solinas 3rd Workshop on Interconnection Network Architectures: On-Chip, Multi-Chip, 2009 | 5 | 2009 |
| Performance sensitivity of NUCA caches to on-chip network parameters A Bardine, M Comparetti, P Foglia, G Gabrielli, CA Prete Computer Architecture and High Performance Computing, 2008. SBAC-PAD'08 …, 2008 | 5 | 2008 |
| Data processing apparatus and method for performing scan operations ML Boettcher, M Eyole-monono, G Gabrielli US Patent 9,355,061, 2016 | 3 | 2016 |
| On-Chip Networks: Impact on the Performance of NUCA Caches A Bardine, M Comparetti, P Foglia, G Gabrielli, CA Prete Proceedings of the 11th EUROMICRO Conference on Digital System Design 43, 2008 | 3 | 2008 |
| Implementation Issues of Way Adaptable D-NUCA Caches A Bardine, M Comparetti, P Foglia, G Gabrielli, CA Prete Proceedings of the Poster Session of the 4th International Summer School on …, 2008 | 2 | 2008 |
| Applicazione della tecnica di riconfigurazione way-adapting alla progettazione di cache D-NUCA G Gabrielli University of Pisa, 2006 | 1 | 2006 |
| Speculation barrier instruction RR Grisenthwaite, G Gabrielli, MJ Horsnell US Patent 10,866,805, 2020 | | 2020 |
| Handling exceptional conditions for vector arithmetic instruction G Gabrielli, NJ Stephens US Patent 10,776,124, 2020 | | 2020 |
| Performance and power optimizations for non-uniform cache memories G Gabrielli University of Pisa, 2010 | | 2010 |
Pierfrancesco FogliaUniversita di PisaVerified email at iet.unipi.it
