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Giacomo Gabrielli
Giacomo Gabrielli
Senior Principal Research Engineer, Arm
Verified email at arm.com
Title
Cited by
Cited by
Year
The ARM Scalable Vector Extension
N Stephens, S Biles, M Boettcher, J Eapen, M Eyole, G Gabrielli, ...
IEEE Micro 37 (2), 26-39, 2017
1932017
Analysis of static and dynamic energy consumption in NUCA caches: Initial results
A Bardine, P Foglia, G Gabrielli, CA Prete
Proceedings of the 2007 workshop on MEmory performance: DEaling withá…, 2007
542007
Leveraging data promotion for low power D-NUCA caches
A Bardine, M Comparetti, P Foglia, G Gabrielli, CA Prete, P Stenstr÷m
Digital System Design Architectures, Methods and Tools, 2008. DSD'08. 11thá…, 2008
342008
Way adaptable D-NUCA caches
A Bardine, M Comparetti, P Foglia, G Gabrielli, C Prete
International Journal of High Performance Systems Architecture 2 (3-4), 215-228, 2010
322010
Improving power efficiency of D-NUCA caches
A Bardine, P Foglia, G Gabrielli, CA Prete, P Stenstr÷m
ACM SIGARCH Computer Architecture News 35 (4), 53-58, 2007
252007
A power-efficient migration mechanism for D-NUCA caches
A Bardine, M Comparetti, P Foglia, G Gabrielli, CA Prete
2009 Design, Automation & Test in Europe Conference & Exhibition, 598-601, 2009
242009
Data processing apparatus and method for processing vector operands
M Boettcher, M Eyole-monono, G Gabrielli
US Patent 10,514,919, 2019
102019
Advanced SIMD: Extending the reach of contemporary SIMD architectures
M Boettcher, BM Al-Hashimi, M Eyole, G Gabrielli, A Reid
2014 Design, Automation & Test in Europe Conference & Exhibition (DATE), 1-4, 2014
102014
MALEC: A multiple access low energy cache
M Boettcher, G Gabrielli, BM Al-Hashimi, D Kershaw
2013 Design, Automation & Test in Europe Conference & Exhibition (DATE), 368-373, 2013
92013
Impact of on-chip network parameters on NUCA cache performances
A Bardine, M Comparetti, P Foglia, G Gabrielli, CA Prete
IET computers & digital techniques 3 (5), 501-512, 2009
92009
Speculation barrier instruction
RR Grisenthwaite, G Gabrielli, MJ Horsnell
US Patent 10,866,805, 2020
62020
Reducing sensitivity to noc latency in nuca caches
P Foglia, G Gabrielli, F Panicucci, M Solinas
3rd Workshop on Interconnection Network Architectures: On-Chip, Multi-Chip, 2009
52009
Performance sensitivity of NUCA caches to on-chip network parameters
A Bardine, M Comparetti, P Foglia, G Gabrielli, CA Prete
Computer Architecture and High Performance Computing, 2008. SBAC-PAD'08á…, 2008
52008
On-Chip Networks: Impact on the Performance of NUCA Caches
A Bardine, M Comparetti, P Foglia, G Gabrielli, CA Prete
Proceedings of the 11th EUROMICRO Conference on Digital System Design 43, 2008
32008
Nuca caches: Analysis of performance sensitivity to noc parameters
A Bardine, M Comparetti, P Foglia, G Gabrielli, CA Prete
Proc. of the Poster Session of the 4th Int. Summer School on Advancedá…, 2008
32008
Handling exceptional conditions for vector arithmetic instruction
G Gabrielli, NJ Stephens
US Patent 10,776,124, 2020
22020
Implementation Issues of Way Adaptable D-NUCA Caches
A Bardine, M Comparetti, P Foglia, G Gabrielli, CA Prete
Proceedings of the Poster Session of the 4th International Summer School oná…, 2008
22008
Applicazione della tecnica di riconfigurazione way-adapting alla progettazione di cache D-NUCA
G Gabrielli
University of Pisa, 2006
12006
Controlling use of data determined by a resolve-pending speculative operation
AD Reid, AP Tonnerre, FCM Piry, PR Greenhalgh, IM Caulfield, T Hayes, ...
US Patent App. 17/310,008, 2022
2022
An apparatus and method for monitoring events in a data processing system
T Hayes, G Gabrielli, MJ Horsnell
US Patent App. 17/271,399, 2021
2021
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