Jason Lowe-Power

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	Total	Desde 2019
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Mark D. HillUniversity of Wisconsin-Madison Professor EmeritusDirección de correo verificada de cs.wisc.edu
David A. WoodUniversity of Wisconsin, MadisonDirección de correo verificada de cs.wisc.edu
Venkatesh AkellaProfessor of Electrical & Computer Engineering, University of California, DavisDirección de correo verificada de ucdavis.edu
Ayaz AkramUniversity of California, DavisDirección de correo verificada de ucdavis.edu
Sean PeisertCybersecurity & Privacy R&D Lead, Lawrence Berkeley National Laboratory; Adjunct Professor, UC DavisDirección de correo verificada de lbl.gov
Christopher NittaAssociate Professor of Teaching, University of California, DavisDirección de correo verificada de ucdavis.edu
S. J. Ben YooUniversity of California, Davis; Lawrence Berkeley Laboratory; BellcoreDirección de correo verificada de ucdavis.edu
Marc OrrGoogleDirección de correo verificada de cs.wisc.edu
Arkaprava BasuAssociate Professor at Indian Institute of Science (IISc)Dirección de correo verificada de iisc.ac.in
Steven K. ReinhardtMicrosoftDirección de correo verificada de microsoft.com
Matt FarrensUniversity of California, DavisDirección de correo verificada de cs.ucdavis.edu
Mahyar SamaniUniversity of California DavisDirección de correo verificada de ucdavis.edu
Pouya FotouhiUniversity of California at DavisDirección de correo verificada de ucdavis.edu
Jignesh M. PatelCarnegie Mellon UniversityDirección de correo verificada de cmu.edu
Hongil YoonGoogleDirección de correo verificada de cs.wisc.edu
Lena E. OlsonGoogleDirección de correo verificada de google.com
Marjan FariborzUniversity of California DavisDirección de correo verificada de ucdavis.edu
Samuel T KingUniversity of California at DavisDirección de correo verificada de ucdavis.edu
Sanjeev TrikaGoogleDirección de correo verificada de google.com
Sebastian WernerUC DavisDirección de correo verificada de ucdavis.edu

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Jason Lowe-Power

Associate Professor, University of California, Davis

Dirección de correo verificada de ucdavis.edu - Página principal

Computer architecture


Título Ordenar por citas Ordenar por año Ordenar por título	Citado por Citado por	Año
gem5-gpu: A heterogeneous cpu-gpu simulator J Power, J Hestness, M Orr, M Hill, D Wood IEEE, 2014	317	2014
The gem5 simulator: Version 20.0+ J Lowe-Power, AM Ahmad, A Akram, M Alian, R Amslinger, M Andreozzi, ... arXiv preprint arXiv:2007.03152, 2020	250	2020
Heterogeneous system coherence for integrated CPU-GPU systems J Power, A Basu, J Gu, S Puthoor, BM Beckmann, MD Hill, SK Reinhardt, ... Proceedings of the 46th Annual IEEE/ACM International Symposium on …, 2013	202	2013
Supporting x86-64 address translation for 100s of GPU lanes J Power, MD Hill, D Wood High Performance Computer Architecture (HPCA), 2014 IEEE 20th International …, 2014	189	2014
Border control: Sandboxing accelerators LE Olson, J Power, MD Hill, DA Wood Proceedings of the 48th International Symposium on Microarchitecture, 470-481, 2015	72	2015
Autotm: Automatic tensor movement in heterogeneous memory systems using integer linear programming M Hildebrand, J Khan, S Trika, J Lowe-Power, V Akella Proceedings of the Twenty-Fifth International Conference on Architectural …, 2020	58	2020
Toward GPUs being mainstream in analytic processing: An initial argument using simple scan-aggregate queries J Power, Y Li, MD Hill, JM Patel, DA Wood Proceedings of the 11th International Workshop on Data Management on New …, 2015	31	2015
Filtering translation bandwidth with virtual caching H Yoon, J Lowe-Power, GS Sohi Proceedings of the Twenty-Third International Conference on Architectural …, 2018	30	2018
Enabling scalable chiplet-based uniform memory architectures with silicon photonics P Fotouhi, S Werner, J Lowe-Power, SJB Yoo Proceedings of the International Symposium on Memory Systems, 222-334, 2019	28	2019
Stream floating: Enabling proactive and decentralized cache optimizations Z Wang, J Weng, J Lowe-Power, J Gaur, T Nowatzki 2021 IEEE International Symposium on High-Performance Computer Architecture …, 2021	22	2021
Performance analysis of scientific computing workloads on general purpose tees A Akram, A Giannakou, V Akella, J Lowe-Power, S Peisert 2021 IEEE International Parallel and Distributed Processing Symposium (IPDPS …, 2021	21	2021
The Davis In-Order (DINO) CPU: A Teaching-Focused RISC-V CPU Design J Lowe-Power, C Nitta Proceedings of the Workshop on Computer Architecture Education, 1-8, 2019	18	2019
A case against hardware managed dram caches for nvram based systems M Hildebrand, JT Angeles, J Lowe-Power, V Akella 2021 IEEE International Symposium on Performance Analysis of Systems and …, 2021	16	2021
Position paper: A case for exposing extra-architectural state in the isa J Lowe-Power, V Akella, MK Farrens, ST King, CJ Nitta Proceedings of the 7th International Workshop on Hardware and Architectural …, 2018	16	2018
Implications of emerging 3D GPU architecture on the scan primitive J Power, Y Li, MD Hill, JM Patel, DA Wood ACM SIGMOD Record 44 (1), 18-23, 2015	15	2015
The gem5 simulator: Version 20.0+. CoRR abs/2007.03152 (2020) J Lowe-Power, AM Ahmad, A Akram, M Alian, R Amslinger, M Andreozzi, ... arXiv preprint arXiv:2007.03152, 2020	12	2020
Enabling reproducible and agile full-system simulation BR Bruce, A Akram, H Nguyen, K Roarty, M Samani, M Friborz, T Reddy, ... 2021 IEEE International Symposium on Performance Analysis of Systems and …, 2021	11	2021
Performance analysis of scientific computing workloads on trusted execution environments A Akram, A Giannakou, V Akella, J Lowe-Power, S Peisert arXiv preprint arXiv:2010.13216, 2020	10	2020
Enabling design space exploration for risc-v secure compute environments A Akram, V Akella, S Peisert, J Lowe-Power	9	2023
Improving provisioned power efficiency in HPC systems with GPU-CAPP K Straube, J Lowe-Power, C Nitta, M Farrens, V Akella 2018 IEEE 25th International Conference on High Performance Computing (HiPC …, 2018	9	2018

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