Mario Nemirovsky
Mario Nemirovsky
ICREA Prof. at the Barcelona Supercomputer Center
Dirección de correo verificada de nemirovskys.com
TítuloCitado porAño
Prioritized instruction scheduling for multi-streaming processors
MD Nemirovsky, AM Nemirovsky, N Sankar
US Patent 6,477,562, 2002
2432002
Key ingredients in an IoT recipe: Fog Computing, Cloud computing, and more Fog Computing
M Yannuzzi, R Milito, R Serral-Gracià, D Montero, M Nemirovsky
2014 IEEE 19th International Workshop on Computer Aided Modeling and Design …, 2014
2082014
Increasing superscalar performance through multistreaming.
W Yamamoto, M Nemirovsky
PaCT 95, 49-58, 1995
1261995
Interstream control and communications for multi-streaming digital processors
MD Nemirovsky, AM Nemirovsky, N Sankar
US Patent 6,389,449, 2002
1242002
Graphene-enabled wireless communication for massive multicore architectures
S Abadal, E Alarcón, A Cabellos-Aparicio, MC Lemme, M Nemirovsky
IEEE Communications Magazine 51 (11), 137-143, 2013
1162013
Interrupt and exception handling for multi-streaming digital processors
MD Nemirovsky, AM Nemirovsky, N Sankar
US Patent 7,020,879, 2006
1012006
Image composition method and apparatus for developing, storing and reproducing image data using absorption, reflection and transmission properties of images to be combined
M O'connor, MD Nemirovsky
US Patent 5,638,499, 1997
971997
Stream processing unit for a multi-streaming processor
M Nemirovsky, S Melvin
US Patent App. 09/826,693, 2001
932001
Redundant memory mappings for fast access to large memories
V Karakostas, J Gandhi, F Ayar, A Cristal, MD Hill, KS McKinley, ...
ACM SIGARCH Computer Architecture News 43 (3), 66-78, 2015
842015
Method and apparatus for optimizing selection of available contexts for packet processing in multi-stream packet processing
E Musoll, M Nemirovsky
US Patent 7,649,901, 2010
772010
Method and apparatus for implementing atomicity of memory operations in dynamic multi-streaming processors
S Melvin, M Nemirovsky
US Patent 7,257,814, 2007
732007
Register transfer unit for electronic processor
MD Nemirovsky, AM Nemirovsky, N Sankar
US Patent 6,292,888, 2001
732001
Queueing system for processors in packet routing operations
M Nemirovsky, E Musoll, S Melvin, N Sankar, N Sampath, A Nemirovsky
US Patent 7,058,064, 2006
65*2006
Mechanism for managing resource locking in a multi-threaded environment
M Nemirovsky, J Huynh
US Patent App. 11/131,600, 2006
622006
A massively multithreaded packet processor
S Melvin, M Nemirovsky, E Musoll, J Huynh, R Milito, H Urdaneta, K Saraf
Network Processor Design, 101-132, 2004
612004
Interstream control and communications for multi-streaming digital processors
MD Nemirovsky, AM Nemirovsky, N Sankar
US Patent 6,789,100, 2004
592004
Mechanism for Managing Resource Locking in a Multi-Threaded Environment
MD Nemirovsky, JT Huynh
US Patent App. 12/698,860, 2010
572010
Multi-threaded packet processing engine for stateful packet processing
SW Melvin, MD Nemirovsky, E Musoll, JT Huynh
US Patent 7,360,217, 2008
542008
Pipelined processor with two tier prefetch buffer structure and method with bypass
RJ Divivier, M Nemirovsky
US Patent 5,680,564, 1997
541997
Tagged prefetch and instruction decoder for variable length instruction set and method of operation
CE Phillips, RJ Divivier, M Nemirovsky
US Patent 6,237,074, 2001
522001
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