Noriyuki Miura
Noriyuki Miura
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Analysis and design of inductive coupling and transceiver circuit for inductive inter-chip wireless superconnect
N Miura, D Mizoguchi, T Sakurai, T Kuroda
IEEE Journal of Solid-State Circuits 40 (4), 829-837, 2005
1612005
A 1.2 Gb/s/pin wireless superconnect based on inductive inter-chip signaling (IIS)
D Mizoguchi, YB Yusof, N Miura, T Sakura, T Kuroda
2004 IEEE International Solid-State Circuits Conference (IEEE Cat. No …, 2004
1372004
A 0.14 pJ/b inductive-coupling inter-chip data transceiver with digitally-controlled precise pulse shaping
N Miura, H Ishikuro, T Sakurai, T Kuroda
2007 IEEE International Solid-State Circuits Conference. Digest of Technical …, 2007
1232007
A 1Tb/s 3W inductive-coupling transceiver for inter-chip clock and data link
N Miura, D Mizoguchi, M Inoue, K Niitsu, Y Nakagawa, M Tago, ...
2006 IEEE International Solid State Circuits Conference-Digest of Technical …, 2006
1232006
A scalable 3D heterogeneous multicore with an inductive ThruChip interface
N Miura, Y Koizumi, Y Take, H Matsutani, T Kuroda, H Amano, ...
IEEE Micro 33 (6), 6-15, 2013
1062013
A scalable 3D heterogeneous multi-core processor with inductive-coupling ThruChip interface
N Miura, Y Koizumi, E Sasaki, Y Take, H Matsutani, T Kuroda, H Amano, ...
Cool Chips XVI (COOL Chips), 2013 IEEE, 1-3, 2013
106*2013
A 195-Gb/s 1.2-W inductive inter-chip wireless superconnect with transmit power control scheme for 3-D-stacked system in a package
N Miura, D Mizoguchi, M Inoue, T Sakurai, T Kuroda
IEEE Journal of Solid-State Circuits 41 (1), 23-34, 2005
932005
An 11Gb/s inductive-coupling link with burst transmission
N Miura, Y Kohama, Y Sugimori, H Ishikuro, T Sakurai, T Kuroda
2008 IEEE International Solid-State Circuits Conference-Digest of Technical …, 2008
912008
A 195Gb/s 1.2 W 3D-stacked inductive inter-chip wireless superconnect with transmit power control scheme
N Miura, D Mizoguchi, M Inoue, H Tsuji, T Sakurai, T Kuroda
ISSCC. 2005 IEEE International Digest of Technical Papers. Solid-State …, 2005
762005
A 1 Tb/s 3 W inductive-coupling transceiver for 3D-stacked inter-chip clock and data link
N Miura, D Mizoguchi, M Inoue, K Niitsu, Y Nakagawa, M Tago, ...
IEEE Journal of Solid-State Circuits 42 (1), 111-122, 2006
702006
A high-speed inductive-coupling link with burst transmission
N Miura, Y Kohama, Y Sugimori, H Ishikuro, T Sakurai, T Kuroda
IEEE Journal of Solid-State Circuits 44 (3), 947-955, 2009
642009
Electronic circuit
T Kuroda, D Mizoguchi, YB Yusof, N Miura, T Sakurai
US Patent 7,768,790, 2010
592010
6W/25mm2 inductive power transfer for non-contact wafer-level testing
A Radecki, H Chung, Y Yoshida, N Miura, T Shidei, H Ishikuro, T Kuroda
2011 IEEE International Solid-State Circuits Conference, 230-232, 2011
542011
An 8Tb/s 1pJ/b 0.8mm2/Tb/s QDR inductive-coupling interface between 65nm CMOS GPU and 0.1μm DRAM
N Miura, K Kasuga, M Saito, T Kuroda
2010 IEEE International Solid-State Circuits Conference-(ISSCC), 436-437, 2010
512010
Cross talk countermeasures in inductive inter-chip wireless superconnect
N Miura, D Mizoguchi, T Sakurai, T Kuroda
Proceedings of the IEEE 2004 Custom Integrated Circuits Conference (IEEE Cat …, 2004
512004
Wideband inductive-coupling interface for high-performance portable system
H Ishikuro, N Miura, T Kuroda
2007 IEEE Custom Integrated Circuits Conference, 13-20, 2007
412007
Analysis and design of transceiver circuit and inductor layout for inductive inter-chip wireless superconnect
N Miura, D Mizoguchi, YB Yusof, T Sakurai, T Kuroda
2004 Symposium on VLSI Circuits. Digest of Technical Papers (IEEE Cat. No …, 2004
402004
A 12-Gb/s non-contact interface with coupled transmission lines
T Takeya, L Nan, S Nakano, N Miura, H Ishikuro, T Kuroda
IEEE journal of solid-state circuits 48 (3), 790-800, 2013
372013
A 0.14 pJ/b inductive-coupling transceiver with digitally-controlled precise pulse shaping
N Miura, H Ishikuro, K Niitsu, T Sakurai, T Kuroda
IEEE Journal of Solid-State Circuits 43 (1), 285-291, 2008
362008
A 2Gb/s 1.8 pJ/b/chip inductive-coupling through-chip bus for 128-Die NAND-flash memory stacking
M Saito, N Miura, T Kuroda
2010 IEEE International Solid-State Circuits Conference-(ISSCC), 440-441, 2010
352010
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