| Breaking ed25519 in wolfssl N Samwel, L Batina, G Bertoni, J Daemen, R Susella Topics in Cryptology–CT-RSA 2018: The Cryptographers' Track at the RSA …, 2018 | 49 | 2018 |
| On the homomorphic computation of symmetric cryptographic primitives S Mella, R Susella Cryptography and Coding: 14th IMA International Conference, IMACC 2013 …, 2013 | 23 | 2013 |
| A novel fault attack against ECDSA A Barenghi, G Bertoni, A Palomba, R Susella 2011 IEEE International Symposium on Hardware-Oriented Security and Trust …, 2011 | 20 | 2011 |
| A compact and exception-free ladder for all short Weierstrass elliptic curves R Susella, S Montrasio International Conference on Smart Card Research and Advanced Applications …, 2016 | 16 | 2016 |
| Method for performing an encryption of an AES type, and corresponding system and computer program product R Susella, S Mella US Patent 9,425,961, 2016 | 15 | 2016 |
| Method for encrypting a message through the computation of mathematical functions comprising modular multiplications GM Bertoni, R Susella US Patent 9,152,383, 2015 | 13 | 2015 |
| Secure and effective implementation of an IOTA light node using STM32 D Stucchi, R Susella, P Fragneto, B Rossi Proceedings of the 2nd Workshop on Blockchain-enabled Networked Sensor, 28-29, 2019 | 12 | 2019 |
| A fault-based secret key retrieval method for ECDSA: analysis and countermeasure A Barenghi, GM Bertoni, L Breveglieri, G Pelosi, S Sanfilippo, R Susella ACM Journal on Emerging Technologies in Computing Systems (JETC) 13 (1), 1-26, 2016 | 12 | 2016 |
| Method for generating a digital signature GM Bertoni, R Susella, A Palomba US Patent 8,817,977, 2014 | 10 | 2014 |
| Method for the generation of a digital signature of a message, corresponding generation unit, electronic apparatus and computer program product R Susella, S Montrasio US Patent 10,333,718, 2019 | 9 | 2019 |
| Mayo: Optimized implementation with revised parameters for armv7-m A Gringiani, A Meneghetti, E Signorini, R Susella Cryptology ePrint Archive, 2023 | 8 | 2023 |
| A flexible ASIC-oriented design for a full NTRU accelerator F Antognazza, A Barenghi, G Pelosi, R Susella Proceedings of the 28th Asia and South Pacific Design Automation Conference …, 2023 | 7 | 2023 |
| An Efficient Unified Architecture for Polynomial Multiplications in Lattice-Based Cryptoschemes. F Antognazza, A Barenghi, G Pelosi, R Susella ICISSP, 81-88, 2023 | 5 | 2023 |
| CASCA: A design automation approach for designing hardware countermeasures against side-channel attacks L Delledonne, V Zaccaria, R Susella, G Bertoni, F Melzani ACM Transactions on Design Automation of Electronic Systems (TODAES) 23 (6 …, 2018 | 5 | 2018 |
| Performance and efficiency exploration of hardware polynomial multipliers for post-quantum lattice-based cryptosystems F Antognazza, A Barenghi, G Pelosi, R Susella SN Computer Science 5 (2), 212, 2024 | 4 | 2024 |
| Profiled side channel attacks against the RSA cryptosystem using neural networks A Barenghi, D Carrera, S Mella, A Pace, G Pelosi, R Susella Journal of Information Security and Applications 66, 103122, 2022 | 4 | 2022 |
| Strengthening sequential side-channel attacks through change detection L Frittoli, M Bocchi, S Mella, D Carrera, B Rossi, P Fragneto, R Susella, ... IACR Transactions on Cryptographic Hardware and Embedded Systems, 1-21, 2020 | 4 | 2020 |
| New results for partial key exposure on RSA with exponent blinding S Cimato, S Mella, R Susella 2015 12th International Joint Conference on e-Business and …, 2015 | 4 | 2015 |
| A high efficiency hardware design for the post-quantum KEM HQC F Antognazza, A Barenghi, G Pelosi, R Susella 2024 IEEE International Symposium on Hardware Oriented Security and Trust …, 2024 | 3 | 2024 |
| Method for performing cryptographic operations in a processing device, corresponding processing device and computer program product R Susella, F Melzani, GM Bertoni US Patent 11,582,039, 2023 | 3 | 2023 |
