| Flash memory device error correction code controllers and related methods and memory systems US Patent 8,112,692, 0 | 190* | |
| Flash Memory Device Error Correction Code Controllers and Related Methods and Memory Systems CD Lee, SW Heo, SY Park, DR Lee CN Patent CN 200,810,144,628, 2013 | 178 | 2013 |
| Flash memory device error correction code controllers and related methods and memory systems CD Lee, SW Heo, SY Park, DR Lee US Patent 7,904,790, 2011 | 178 | 2011 |
| Flash Memory Device Error Correction Code Controllers and Related Methods and Memory Systems CD Lee, SW Heo, SY Park, DR Lee KR Patent App. 10-0,842,680, 2008 | 178 | 2008 |
| Flash memory system for improving read performance and read method thereof CD Lee, SW Heo, SY Park, DR Lee US Patent App. 11/694,237, 2008 | 41 | 2008 |
| Flash Memory System for improving Read Performance and Read Method thereof CD Lee, SW Heo, SY Park, DR Lee KR Patent App. 10-0,813,630, 2008 | 41 | 2008 |
| Memory card using multi-level signaling and memory system having the same SW Heo, M Kang, CD Lee, SM Shin US Patent 8,054,689, 2011 | 21 | 2011 |
| Memory card using multi-level signaling and memory system having the same SW Heo, M Kang, CD Lee, SM Shin KR Patent App. 10-2009-0,131,954, 2009 | 21 | 2009 |
| Determining Storage Device Connection Information for Serial and Parallel Computer Interfaces to Storage Devices SW Heo, SH Park, SY Bahng, SY Park DE Patent DE102007009300 B4, 2012 | 10 | 2012 |
| Determining storage device connection information for serial and parallel computer interfaces to storage devices SW Heo, SH Park, SY Bahng, SY Park US Patent 7,631,112, 2009 | 10 | 2009 |
| Determining Storage Device Connection Information for Serial and Parallel Computer Interfaces to Storage Devices SW Heo, SH Park, SY Bahng, SY Park KR Patent App. 10-2007-0,082,766, 2007 | 10 | 2007 |
| Determining Storage Device Connection Information for Serial and Parallel Computer Interfaces to Storage Devices SW Heo, SH Park, SY Bahng, SY Park JP Patent 2005-166,097, 2005 | 10* | 2005 |
| Flash memory device error correction code controllers and related methods and memory systems CD Lee, SW Heo, SY Park, DR Lee US Patent 8,788,905, 2014 | 7 | 2014 |
| Study of optimized adder selection SW Heo, YS Lee ASIC, 2003. Proceedings. 5th International Conference on 2, 1265-1268, 2003 | 6 | 2003 |
| Power optimization of sum-of-products design for signal processing applications SW Heo University of California at Los Angeles, 2014 | 4 | 2014 |
| Memory Card, Data Driving Method thereof, and Memory Card System including the same SH Park, SY Bahng, SW Heo JP Patent JP,4966672,B2, 2012 | 4 | 2012 |
| Memory card, data driving method thereof, and memory card system including the same SH Park, SY Bahng, SW Heo US Patent 7,590,011, 2009 | 4 | 2009 |
| Memory Card, Data Driving Method thereof, and Memory Card System including the same SH Park, SY Bahng, SW Heo KR Patent App. 10-2007-0,079,225, 2007 | 4 | 2007 |
| Power optimization in a parallel multiplier using voltage islands SW Heo, SJ Huh, MD Ercegovac 2013 IEEE International Symposium on Circuits and Systems (ISCAS), 345-348, 2013 | 2 | 2013 |
| Flash Memory Card SW Heo, CD Lee, JS Yu, DR Lee KR Patent App. 10-2008-0,070,993, 2008 | 2 | 2008 |
Milos D. Ercegovac, Distinguished Pro...University of California, Los AngelesDirección de correo verificada de cs.ucla.edu
