Encarni Castillo
Encarni Castillo
Professor at University of Granada (Profesora Titular de Universidad)
Verified email at ditec.ugr.es
Cited by
Cited by
IPP@ HDL: efficient intellectual property protection scheme for IP cores
E Castillo, U Meyer-Baese, A García, L Parrilla, A Lloris
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 15 (5), 578-591, 2007
Ring oscillators as thermal sensors in FPGAs: Experiments in low voltage
JJL Franco, E Boemo, E Castillo, L Parrilla
2010 VI Southern Programmable Logic Conference (SPL), 133-137, 2010
Flexible ECG acquisition system based on analog and digital reconfigurable devices
DP Morales, A Garcia, E Castillo, MA Carvajal, J Banqueri, AJ Palma
Sensors and Actuators A: Physical 165 (2), 261-270, 2011
Efficient wavelet-based ECG processing for single-lead FHR extraction
E Castillo, DP Morales, G Botella, A García, L Parrilla, AJ Palma
Digital Signal Processing 23 (6), 1897-1909, 2013
Noise suppression in ECG signals through efficient one-step wavelet processing techniques
E Castillo, DP Morales, A García, F Martínez-Martí, L Parrilla, AJ Palma
Journal of Applied Mathematics 2013, 2013
An application of reconfigurable technologies for non-invasive fetal heart rate extraction
DP Morales, A Garcia, E Castillo, MA Carvajal, L Parrilla, AJ Palma
Medical Engineering & Physics 35 (7), 1005-1014, 2013
Minimum-clock-cycle Itoh-Tsujii algorithm hardware implementation for cryptography applications over GF (2m) fields
L Parrilla, A Lloris, E Castillo, A Garcia
Electronics letters 48 (18), 1126-1128, 2012
Automated signature insertion in combinational logic patterns for HDL IP core protection
E Castillo, L Parrilla, A Garcia, U Meyer-Baese, G Botella, A Lloris
2008 4th Southern Conference on Programmable Logic, 183-186, 2008
Evaluation of a reconfigurable portable instrument for copper determination based on luminescent carbon dots
A Salinas-Castillo, DP Morales, A Lapresta-Fernández, M Ariza-Avidad, ...
Analytical and bioanalytical chemistry 408 (11), 3013-3020, 2016
IPP watermarking technique for IP core protection on FPL devices
E Castillo, L Parrilla, A Garcia, A Loris, U Meyer-Baese
2006 International Conference on Field Programmable Logic and Applications, 1-6, 2006
Design guidelines of laser reduced graphene oxide conformal thermistor for IoT applications
FJ Romero, A Rivadeneyra, V Toral, E Castillo, F García-Ruiz, ...
Sensors and Actuators A: Physical 274, 148-154, 2018
A reconstruction method for electrical capacitance tomography based on image fusion techniques
AM Olmos, G Botella, E Castillo, DP Morales, J Banqueri, A García
Digital Signal Processing 22 (6), 885-893, 2012
Intellectual property protection (IPP) using obfuscation in C, VHDL, and verilog coding
U Meyer-Bäse, E Castillo, G Botella, L Parrilla, A García
Independent Component Analyses, Wavelets, Neural Networks, Biosystems, and …, 2011
A balanced HW/SW teaching approach for embedded microprocessors
U Meyer-Baese, G Botella, E Castillo, A Garcia
International Journal of Engineering Education 26 (3), 584-592, 2010
Faster than the FFT: the chirp-z RAG-n discrete fast Fourier transform
U Meyer-Bäse, H Natarajan, E Castillo, A García
Frequenz 60 (7-8), 147-151, 2006
Dynamical graph theory networks techniques for the analysis of sparse connectivity networks in dementia
A Tahmassebi, K Pinker-Domenig, G Wengert, M Lobbes, A Stadlbauer, ...
Smart Biomedical and Physiological Sensor Technology XIV 10216, 1021609, 2017
Enhancing ADC resolution through Field Programmable Analog Array dynamic reconfiguration
DP Morales, A Garcia, AJ Palma, MA Carvajal, E Castillo, ...
2008 International Conference on Field Programmable Logic and Applications …, 2008
Hardware activation by means of PUFs and elliptic curve cryptography in field-programmable devices
L Parrilla, E Castillo, DP Morales, A García
Electronics 5 (1), 5, 2016
Energy optimization of Application-Specific Instruction-Set Processors by using hardware accelerators in semicustom ICs technology
U Meyer-Baese, G Botella, S Mookherjee, E Castillo, A García
Microprocessors and Microsystems 36 (2), 127-137, 2012
Intellectual property protection for RNS circuits on FPGAs
L Parrilla, E Castillo, A García, A Lloris
International Conference on Field Programmable Logic and Applications, 1139-1141, 2004
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