| Residue number system for low-power DSP applications GC Cardarilli, A Nannarelli, M Re 2007 Conference Record of the Forty-First Asilomar Conference on Signals …, 2007 | 127 | 2007 |
| A radix-10 combinational multiplier T Lang, A Nannarelli 2006 Fortieth Asilomar Conference on Signals, Systems and Computers, 313-317, 2006 | 122 | 2006 |
| An efficient hardware implementation of reinforcement learning: The q-learning algorithm S Spano, GC Cardarilli, L Di Nunzio, R Fazzolari, D Giardino, M Matta, ... Ieee Access 7, 186340-186351, 2019 | 88 | 2019 |
| Low-power adaptive filter based on RNS components GL Bernocchi, GC Cardarilli, A Del Re, A Nannarelli, M Re 2007 IEEE International Symposium on Circuits and Systems, 3211-3214, 2007 | 77 | 2007 |
| A radix-10 digit-recurrence division unit: algorithm and architecture T Lang, A Nannarelli IEEE Transactions on Computers 56 (6), 727-739, 2007 | 76 | 2007 |
| Cached-code compression for energy minimization in embedded processors L Benini, A Macii, A Nannarelli Proceedings of the 2001 international symposium on Low power electronics and …, 2001 | 71 | 2001 |
| Reducing power dissipation in FIR filters using the residue number system GC Cardarilli, A Nannarelli, M Re Proceedings of the 43rd IEEE Midwest Symposium on Circuits and Systems (Cat …, 2000 | 67 | 2000 |
| A variant of a radix-10 combinational multiplier L Dadda, A Nannarelli 2008 IEEE International Symposium on Circuits and Systems, 3370-3373, 2008 | 61 | 2008 |
| Power efficient division and square root unit W Liu, A Nannarelli IEEE Transactions on Computers 61 (8), 1059-1070, 2012 | 59 | 2012 |
| Tradeoffs between residue number system and traditional FIR filters A Nannarelli, M Re, GC Cardarilli ISCAS 2001. The 2001 IEEE International Symposium on Circuits and Systems …, 2001 | 59 | 2001 |
| Improved 64-bit radix-16 booth multiplier based on partial product array height reduction E Antelo, P Montuschi, A Nannarelli IEEE Transactions on Circuits and Systems I: Regular Papers 64 (2), 409-418, 2016 | 58 | 2016 |
| Low-power divider A Nannarelli, T Lang IEEE Transactions on Computers 48 (1), 2-14, 1999 | 57 | 1999 |
| Imprecise arithmetic for low power image processing P Albicocco, GC Cardarilli, A Nannarelli, M Petricca, M Re 2012 Conference Record of the Forty Sixth Asilomar Conference on Signals …, 2012 | 46 | 2012 |
| Digit-recurrence dividers with reduced logical depth E Antelo, T Lang, P Montuschi, A Nannarelli IEEE Transactions on Computers 54 (7), 837-851, 2005 | 46 | 2005 |
| A pseudo-softmax function for hardware-based high speed image classification GC Cardarilli, L Di Nunzio, R Fazzolari, D Giardino, A Nannarelli, M Re, ... Scientific reports 11 (1), 15307, 2021 | 40 | 2021 |
| -Dimensional Approximation of Euclidean Distance GC Cardarilli, L Di Nunzio, R Fazzolari, A Nannarelli, M Re, S Spanò IEEE Transactions on Circuits and Systems II: Express Briefs 67 (3), 565-569, 2019 | 37 | 2019 |
| Low power and low leakage implementation of RNS FIR filters GC Cardarilli, A Del Re, A Nannarelli, M Re Conference Record of the Thirty-Ninth Asilomar Conference onSignals, Systems …, 2005 | 34 | 2005 |
| Power characterization of digital filters implemented on FPGA GC Cardarilli, A Del Re, A Nannarelli, M Re 2002 IEEE International Symposium on Circuits and Systems. Proceedings (Cat …, 2002 | 29 | 2002 |
| Programmable power-of-two RNS scaler and its application to a QRNS polyphase filter GC Cardarilli, A Del Re, A Nannarelli, M Re 2005 IEEE International Symposium on Circuits and Systems, 1102-1105, 2005 | 28 | 2005 |
| A tool for automatic generation of RTL-level VHDL description of RNS FIR filters A Del Re, A Nannarelli, M Re Proceedings Design, Automation and Test in Europe Conference and Exhibition …, 2004 | 28 | 2004 |
