| The end of CMOS scaling: toward the introduction of new materials and structural changes to improve MOSFET performance T Skotnicki, JA Hutchby, TJ King, HSP Wong, F Boeuf IEEE Circuits and Devices Magazine 21 (1), 16-26, 2005 | 546 | 2005 |
| Plasma wave detection of terahertz radiation by silicon field effects transistors: Responsivity and noise equivalent power R Tauk, F Teppe, S Boubanga, D Coquillat, W Knap, YM Meziani, ... Applied Physics Letters 89 (25), 2006 | 422 | 2006 |
| Broadband terahertz imaging with highly sensitive silicon CMOS detectors F Schuster, D Coquillat, H Videlier, M Sakowicz, F Teppe, L Dussopt, ... Optics express 19 (8), 7827-7832, 2011 | 396 | 2011 |
| Plasma wave detection of sub-terahertz and terahertz radiation by silicon field-effect transistors W Knap, F Teppe, Y Meziani, N Dyakonova, J Lusakowski, F Boeuf, ... Applied Physics Letters 85 (4), 675-677, 2004 | 385 | 2004 |
| Silicon-on-Nothing (SON)-an innovative process for advanced CMOS M Jurczak, T Skotnicki, M Paoli, B Tormen, J Martins, JL Regolini, ... IEEE Transactions on Electron Devices 47 (11), 2179-2187, 2000 | 313 | 2000 |
| Silicon Heterostructure Handbook: Materials, Fabrication, Devices, Circuits and Applications of SiGe and Si Strained-Layer Epitaxy JD Cressler, S Monfray, G Freeman, D Friedman, DJ Paul, S Tsujino, ... CRC press, 2018 | 297 | 2018 |
| Thermoelectricity for IoT–A review M Haras, T Skotnicki Nano Energy 54, 461-476, 2018 | 282 | 2018 |
| Innovative materials, devices, and CMOS technologies for low-power mobile multimedia T Skotnicki, C Fenouillet-Beranger, C Gallon, F Boeuf, S Monfray, F Payet, ... IEEE transactions on electron devices 55 (1), 96-130, 2007 | 270 | 2007 |
| Novel integration process and performances analysis of Low STandby Power (LSTP) 3D Multi-Channel CMOSFET (MCFET) on SOI with Metal/High-K Gate stack E Bernard, T Ernst, B Guillaumot, N Vulliet, V Barral, V Maffini-Alvaro, ... 2008 Symposium on VLSI Technology, 16-17, 2008 | 236 | 2008 |
| Method for making a semiconductor device comprising a stack alternately consisting of silicon layers and dielectric material layers T Skotnicki, M Jurczak US Patent 6,713,356, 2004 | 200 | 2004 |
| Vibratory beam electromechanical resonator T Skotnicki, D Dutartre, P Ribot US Patent 6,873,088, 2005 | 184 | 2005 |
| DRAM cell with high integration density T Skotnicki, S Monfray, C Mallardeau US Patent 6,534,811, 2003 | 177 | 2003 |
| The voltage-doping transformation: a new approach to the modeling of MOSFET short-channel effects T Skotnicki, G Merckel, T Pedron IEEE Electron Device Letters 9 (3), 109-112, 1988 | 175 | 1988 |
| FDSOI devices with thin BOX and ground plane integration for 32 nm node and below C Fenouillet-Beranger, S Denorme, P Perreau, C Buj, O Faynot, F Andrieu, ... Solid-State Electronics 53 (7), 730-734, 2009 | 163 | 2009 |
| Unexpected mobility degradation for very short devices: A new challenge for CMOS scaling A Cros, K Romanjek, D Fleury, S Harrison, R Cerutti, P Coronel, ... 2006 International Electron Devices Meeting, 1-4, 2006 | 146 | 2006 |
| 75 nm damascene metal gate and high-k integration for advanced CMOS devices B Guillaumot, X Garros, F Lime, K Oshima, B Tavel, JA Chroboczek, ... Digest. International Electron Devices Meeting,, 355-358, 2002 | 143 | 2002 |
| A capacitor-less DRAM cell on 75nm gate length, 16nm thin fully depleted SOI device for high density embedded memories R Ranica, A Villaret, C Fenouillet-Beranger, P Malinge, P Mazoyer, ... IEDM Technical Digest. IEEE International Electron Devices Meeting, 2004 …, 2004 | 132 | 2004 |
| SON (silicon on nothing)-a new device architecture for the ULSI era M Jurczak, T Skotnicki, M Paoli, B Tormen, JL Regolini, C Morin, A Schiltz, ... 1999 Symposium on VLSI Technology. Digest of Technical Papers (IEEE Cat. No …, 1999 | 132 | 1999 |
| High performance UTBB FDSOI devices featuring 20nm gate length for 14nm node and beyond Q Liu, M Vinet, J Gimbert, N Loubet, R Wacquez, L Grenouillet, Y Le Tiec, ... 2013 IEEE International Electron Devices Meeting, 9.2. 1-9.2. 4, 2013 | 118 | 2013 |
| Process for transferring a layer of strained semiconductor material B Ghyselen, D Bensahel, T Skotnicki US Patent 6,953,736, 2005 | 117* | 2005 |
Frederic BoeufSTMicroelectronicsVerified email at st.com
