Takeshi Ohkawa
Takeshi Ohkawa
Associate Professor, Faculty of Information and Communication, Tokai University
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Citado por
System for Preparing Software Documentation in Natural Languages
S Hirano, T Ohkawa, R Qu
US Patent App. 11/996,809, 2010
Proposal of ROS-compliant FPGA component for low-power robotic systems
K Yamashina, T Ohkawa, K Ootsu, T Yokota
arXiv preprint arXiv:1508.07123, 2015
crecomp: Automated design tool for ros-compliant fpga component
K Yamashina, H Kimura, T Ohkawa, K Ootsu, T Yokota
2016 IEEE 10th International Symposium on Embedded Multicore/Many-core …, 2016
Acceleration of publish/subscribe messaging in ROS-compliant FPGA component
Y Sugata, T Ohkawa, K Ootsu, T Yokota
Proceedings of the 8th International Symposium on Highly Efficient …, 2017
Distributed calculation method for large-pixel-number holograms by decomposition of object and hologram planes
BJ Jackin, H Miyata, T Ohkawa, K Ootsu, T Yokota, Y Hayasaki, T Yatagai, ...
Optics Letters 39 (24), 6867-6870, 2014
A data acquisition middleware
Y Yasu, K Nakayoshi, E Inoue, H Sendai, H Fujii, N Ando, T Kotoku, ...
2007 15th IEEE-NPSS Real-Time Conference, 1-3, 2007
Decomposition method for fast computation of gigapixel-sized Fresnel holograms on a graphics processing unit cluster
BJ Jackin, S Watanabe, K Ootsu, T Ohkawa, T Yokota, Y Hayasaki, ...
Applied Optics 57 (12), 3134-3145, 2018
FPGA components for integrating FPGAs into robot systems
T Ohkawa, K Yamashina, H Kimura, K Ootsu, T Yokota
IEICE TRANSACTIONS on Information and Systems 101 (2), 363-375, 2018
Architecture exploration of intelligent robot system using ROS-compliant FPGA component
T Ohkawa, K Yamashina, T Matsumoto, K Ootsu, T Yokota
2016 International Symposium on Rapid System Prototyping (RSP), 1-7, 2016
High level synthesis of ROS protocol interpretation and communication circuit for FPGA
T Ohkawa, Y Sugata, H Watanabe, N Ogura, K Ootsu, T Yokota
2019 IEEE/ACM 2nd International Workshop on Robotics Software Engineering …, 2019
COOL interconnect low power interconnection technology for scalable 3D LSI design
M Chacin, H Uchida, M Hagimoto, T Miyazaki, T Ohkawa, R Ikeno, ...
2011 IEEE Cool Chips XIV, 1-3, 2011
Automated integration of high-level synthesis FPGA modules with ROS2 systems
DP Leal, M Sugaya, H Amano, T Ohkawa
2020 International Conference on Field-Programmable Technology (ICFPT), 292-293, 2020
A translation method of ARM machine code to LLVM-IR for binary code parallelization and optimization
K Shigenobu, K Ootsu, T Ohkawa, T Yokota
2017 Fifth International Symposium on Computing and Networking (CANDAR), 575-579, 2017
Runtime overhead reduction in automated parallel processing system using valgrind
T Hoshi, K Ootsu, T Ohkawa, T Yokota
2013 First International Symposium on Computing and Networking, 572-576, 2013
FPGA acceleration of ROS2-based reinforcement learning agents
DP Leal, M Sugaya, H Amano, T Ohkawa
2020 Eighth International Symposium on Computing and Networking Workshops …, 2020
An android cluster system capable of dynamic node reconfiguration
Y Sawada, Y Arai, K Ootsu, T Yokota, T Ohkawa
2015 Seventh International Conference on Ubiquitous and Future Networks, 689-694, 2015
Reconfigurable and hardwired orb engine on FPGA by java-to-hdl synthesizer for realtime application
T Ohkawa, D Uetake, T Yokota, K Ootsu, T Baba
ACM SIGARCH Computer Architecture News 41 (5), 77-82, 2014
Efficient Data Communication using Dynamic Switching of Compression Method
M Omote, K Ootsu, T Ohkawa, T Yokota
2013 First International Symposium on Computing and Networking, 607-611, 2013
A personal-use single-chip emulator using dynamically reconfigurable logic array
K Kotani, N Miyamoto, T Ohkawa, A Jamak, S Kita, T Ohmi
2005 IEEE Asian Solid-State Circuits Conference, 329-332, 2005
The Flexible Processor-dynamically reconfigurable logic array for personal-use emulation system
T Ohkawa, T Nozawa, M Fujibayashi, N Miyamoto, K Leo, S Kita, K Kotani, ...
2003 Symposium on VLSI Circuits. Digest of Technical Papers (IEEE Cat. No …, 2003
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