Joseph Pusdesris
Joseph Pusdesris
Arm Inc.
Verified email at umich.edu - Homepage
Title
Cited by
Cited by
Year
Sources of error in full-system simulation
A Gutierrez, J Pusdesris, RG Dreslinski, T Mudge, C Sudanthi, ...
2014 IEEE International Symposium on Performance Analysis of Systems and …, 2014
1042014
Data processing apparatus with memory rename table for mapping memory addresses to registers
JM Pusdesris, Y Kang, A Pellegrini, BA Vandersloot, TN Mudge
US Patent 9,471,480, 2016
92016
Lazy cache invalidation for self-modifying codes
A Gutierrez, J Pusdesris, RG Dreslinski, T Mudge
Proceedings of the 2012 international conference on Compilers, architectures …, 2012
22012
Storage circuitry request tracking
A MONTERO, MR Dooley, JM PUSDESRIS, KM Bruce, C ABERNATHY
US Patent App. 16/118,610, 2020
2020
The Arm Neoverse N1 Platform: Building Blocks for the Next-Gen Cloud-to-Edge Infrastructure SoC
A Pellegrini, N Stephens, M Bruce, Y Ishii, J Pusdesris, A Raja, ...
IEEE Micro, 2020
2020
Data processing
M Filippo, J Jalal, KM Bruce, PG Meyer, DJ Hawkins, PK Mannava, ...
US Patent App. 16/521,621, 2019
2019
Temporal Prefetching Without the Off-Chip Metadata
H Wu, K Nathella, J Pusdesris, D Sunwoo, A Jain, C Lin
Proceedings of the 52nd Annual IEEE/ACM International Symposium on …, 2019
2019
Memory controller having data access hint message for specifying the given range of one or more memory addresses
M Filippo, J Jalal, KM Bruce, PG Meyer, DJ Hawkins, PK Mannava, ...
US Patent 10,402,349, 2019
2019
Data processing apparatus and method for decoding program instructions in order to generate control signals for processing circuitry of the data processing apparatus
JM Pusdesris, TN Mudge, TD Manville
US Patent 9,880,843, 2018
2018
A memory rename table to reduce energy and improve performance
J Pusdesris, B VanderSloot, T Mudge
2014 IEEE/ACM International Symposium on Low Power Electronics and Design …, 2014
2014
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Articles 1–10