| Tunnel field-effect transistors as energy-efficient electronic switches AM Ionescu, H Riel nature 479 (7373), 329-337, 2011 | 1852 | 2011 |
| Double-Gate Tunnel FET With High-Gate Dielectric K Boucart, AM Ionescu IEEE transactions on electron devices 54 (7), 1725-1733, 2007 | 1011 | 2007 |
| Suspended-gate MOSFET: Bringing new MEMS functionality into solid-state MOS transistor N Abelé, R Fritschi, K Boucart, F Casset, P Ancey, AM Ionescu IEEE InternationalElectron Devices Meeting, 2005. IEDM Technical Digest …, 2005 | 193 | 2005 |
| Metal-ferroelectric-meta-oxide-semiconductor field effect transistor with sub-60mV/decade subthreshold swing and internal voltage amplification A Rusu, GA Salvatore, D Jiménez, AM Ionescu 2010 International Electron Devices Meeting, 16.3. 1-16.3. 4, 2010 | 169 | 2010 |
| Analytical modeling of single electron transistor for hybrid CMOS-SET analog IC design S Mahapatra, V Vaish, C Wasshuber, K Banerjee, AM Ionescu IEEE Transactions on Electron Devices 51 (11), 1772-1782, 2004 | 165 | 2004 |
| Length scaling of the double gate tunnel FET with a high-k gate dielectric K Boucart, AM Ionescu Solid-State Electronics 51 (11-12), 1500-1507, 2007 | 161 | 2007 |
| A new definition of threshold voltage in tunnel FETs K Boucart, AM Ionescu Solid-state electronics 52 (9), 1318-1323, 2008 | 122 | 2008 |
| CMOS compatible fully integrated Mach-Zehnder interferometer in SOI technology P Dainesi, A Kung, M Chabloz, A Lagos, P Fluckiger, A Ionescu, P Fazan, ... IEEE Photonics Technology Letters 12 (6), 660-662, 2000 | 122 | 2000 |
| Demonstration of subthrehold swing smaller than 60mV/decade in Fe-FET with P(VDF-TrFE)/SiO2 gate stack GA Salvatore, D Bouvet, AM Ionescu 2008 IEEE International electron devices meeting, 1-4, 2008 | 115 | 2008 |
| Non-contact characterization of graphene surface impedance at micro and millimeter waves JS Gomez-Diaz, J Perruisseau-Carrier, P Sharma, A Ionescu Journal of Applied Physics 111 (11), 114908, 2012 | 101 | 2012 |
| Self-biased reconfigurable graphene stacks for terahertz plasmonics JS Gomez-Diaz, C Moldovan, S Capdevila, J Romeu, LS Bernard, ... Nature communications 6 (1), 1-8, 2015 | 96 | 2015 |
| Understanding the superlinear onset of tunnel-FET output characteristic L De Michielis, L Lattanzio, AM Ionescu IEEE electron device letters 33 (11), 1523-1525, 2012 | 94 | 2012 |
| Analytical modeling of the suspended-gate FET and design insights for low-power logic K Akarvardar, C Eggimann, D Tsamados, YS Chauhan, GC Wan, ... IEEE transactions on Electron Devices 55 (1), 48-59, 2007 | 93 | 2007 |
| Complementary germanium electron–hole bilayer tunnel FET for sub-0.5-V operation L Lattanzio, L De Michielis, AM Ionescu IEEE Electron Device Letters 33 (2), 167-169, 2011 | 92 | 2011 |
| Realization of multiple valued logic and memory by hybrid SETMOS architecture S Mahapatra, AM Ionescu IEEE transactions on Nanotechnology 4 (6), 705-714, 2005 | 90 | 2005 |
| Modeling and design of a low-voltage SOI suspended-gate MOSFET (SG-MOSFET) with a metal-over-gate architecture AM Ionescu, V Pott, R Fritschi, K Banerjee, MJ Declercq, P Renaud, ... Proceedings International Symposium on Quality Electronic Design, 496-501, 2002 | 88 | 2002 |
| Self-heating characterization and extraction method for thermal resistance and capacitance in high voltage MOSFETs C Anghel, AM Ionescu, N Hefyene, R Gillon ESSDERC'03. 33rd Conference on European Solid-State Device Research, 2003 …, 2003 | 87 | 2003 |
| A quasi-analytical SET model for few electron circuit simulation S Mahapatra, AM Ionescu, K Banerjee IEEE Electron Device Letters 23 (6), 366-368, 2002 | 85 | 2002 |
| Hybrid CMOS single-electron-transistor device and circuit design AMI S. Mahapatra Artech House, Inc. Norwood, MA, USA ©2006, 2006 | 84 | 2006 |
| Electronic devices: nanowire transistors made easy AM Ionescu Nature nanotechnology 5 (3), 178, 2010 | 81 | 2010 |
Kirsten MoselundIBM ResearchVerified email at zurich.ibm.com
