Branch prediction on demand: an energy-efficient solution D Chaver, L Pinuel, M Prieto, F Tirado, MC Huang Proceedings of the 2003 international symposium on Low power electronics and …, 2003 | 67 | 2003 |
Customizing the branch predictor to reduce complexity and energy consumption MC Huang, D Chaver, L Pinuel, M Prieto, F Tirado IEEE micro 23 (5), 12-25, 2003 | 51 | 2003 |
Parallel wavelet transform for large scale image processing D Chaver, M Prieto, L Piñuel, F Tirado Proceedings 16th international parallel and distributed processing symposium …, 2002 | 43 | 2002 |
2-D wavelet transform enhancement on general-purpose microprocessors: Memory hierarchy and SIMD parallelism exploitation D Chaver, C Tenllado, L Pinuel, M Prieto, F Tirado High Performance Computing—HiPC 2002: 9th International Conference …, 2002 | 42 | 2002 |
Reducing writes in phase-change memory environments by using efficient cache replacement policies R Rodriguez-Rodriguez, F Castro, D Chaver, L Pinuel, F Tirado 2013 Design, Automation & Test in Europe Conference & Exhibition (DATE), 93-96, 2013 | 36 | 2013 |
Towards completely fair scheduling on asymmetric single-ISA multicore processors JC Saez, A Pousa, F Castro, D Chaver, M Prieto-Matias Journal of Parallel and Distributed Computing 102, 115-131, 2017 | 35 | 2017 |
MIPSfpga: using a commercial MIPS soft‐core in computer architecture education SL Harris, DM Harris, D Chaver, R Owen, ZL Kakakhel, E Sedano, ... IET Circuits, Devices & Systems 11 (4), 283-291, 2017 | 31 | 2017 |
ACFS: A completely fair scheduler for asymmetric single-ISA multicore systems JC Saez, A Pousa, F Castro, D Chaver, M Prieto-Matias Proceedings of the 30th Annual ACM Symposium on Applied Computing, 2027-2032, 2015 | 30 | 2015 |
Rvfpga: Using a risc-v core targeted to an fpga in computer architecture education SL Harris, D Chaver, L Piñuel, JI Gomez-Perez, MH Liaqat, ZL Kakakhel, ... 2021 31st International Conference on Field-Programmable Logic and …, 2021 | 26 | 2021 |
Vectorization of the 2D wavelet lifting transform using SIMD extensions D Chaver, C Tenllado, L Pinuel, M Prieto, F Tirado Proceedings International Parallel and Distributed Processing Symposium, 8 pp., 2003 | 24 | 2003 |
DMDC: delayed memory dependence checking through age-based filtering F Castro, L Pinuel, D Chaver, M Prieto, M Huang, F Tirado 2006 39th Annual IEEE/ACM International Symposium on Microarchitecture …, 2006 | 22 | 2006 |
Energy-aware fetch mechanism: trace cache and BTB customization D Chaver, MA Rojas, L Pinuel, M Prieto, F Tirado, MC Huang Proceedings of the 2005 international symposium on Low power electronics and …, 2005 | 20 | 2005 |
Wavelet transform for large scale image processing on modern microprocessors D Chaver, C Tenllado, L Pinuel, M Prieto, F Tirado International Conference on High Performance Computing for Computational …, 2002 | 18 | 2002 |
L1 data cache power reduction using a forwarding predictor P Carazo, R Apolloni, F Castro, D Chaver, L Pinuel, F Tirado Integrated Circuit and System Design. Power and Timing Modeling …, 2011 | 17 | 2011 |
Load-store queue management: an energy-efficient design based on a state-filtering mechanism F Castro, D Chaver, L Pinuel, M Prieto, F Tirado, M Huang 2005 International Conference on Computer Design, 617-624, 2005 | 17 | 2005 |
An OS-oriented performance monitoring tool for multicore systems JC Saez, J Casas, A Serrano, R Rodríguez-Rodríguez, F Castro, ... Euro-Par 2015: Parallel Processing Workshops: Euro-Par 2015 International …, 2015 | 16 | 2015 |
Substituting associative load queue with simple hash tables in out-of-order microprocessors A Garg, F Castro, M Huang, D Chaver, L Pinuel, M Prieto Proceedings of the 2006 international symposium on Low power electronics and …, 2006 | 13 | 2006 |
Write-aware replacement policies for pcm-based systems R Rodríguez-Rodríguez, F Castro, D Chaver, R González-Alberquilla, ... The Computer Journal 58 (9), 2000-2025, 2015 | 11 | 2015 |
Reuse detector: Improving the management of STT-RAM SLLCs R Rodríguez-Rodríguez, J Díaz, F Castro, P Ibáñez, D Chaver, V Viñals, ... The Computer Journal 61 (6), 856-880, 2018 | 9 | 2018 |
Exploring the throughput-fairness trade-off on asymmetric multicore systems JC Saez, A Pousa, F Castro, D Chaver, M Prieto-Matías Euro-Par 2014: Parallel Processing Workshops: Euro-Par 2014 International …, 2014 | 9 | 2014 |