Demonstration of MOSFET-like on-current performance in arsenide/antimonide tunnel FETs with staggered hetero-junctions for 300mV logic applications DK Mohata, R Bijesh, S Mujumdar, C Eaton, R Engel-Herbert, T Mayer, ...
2011 International Electron Devices Meeting, 33.5. 1-33.5. 4, 2011
134 2011 3DNAND GIDL-assisted body biasing for erase enabling CMOS under array (CUA) architecture C Caillat, K Beaman, A Bicksler, E Camozzi, T Ghilardi, G Huang, H Liu, ...
2017 IEEE International Memory Workshop (IMW), 1-4, 2017
39 2017 Methods of forming gate structures for transistor devices for CMOS applications Z Hong, S Tzeng, A Joshi, A Bodke, D Pisharoty, U Raghuram, O Karlsson, ...
US Patent 9,105,497, 2015
36 2015 Layout-dependent strain optimization for p-channel trigate transistors S Mujumdar, K Maitra, S Datta
IEEE transactions on electron devices 59 (1), 72-78, 2011
18 2011 Two Step Deposition of High-k Gate Dielectric Materials K Kashefi, A Joshi, S Mujumdar
US Patent App. 14/083,761, 2015
15 2015 Selector Elements M Clark, P Phatak, C Chen, A Bodke, S Mujumdar, F Nardi, S Kahlon, ...
US Patent App. 15/287,091, 2017
12 2017 Methods of forming gate structures for transistor devices for cmos applications and the resulting products Z Hong, S Tzeng, A Joshi, A Bodke, D Pisharoty, U Raghuram, O Karlsson, ...
US Patent App. 14/793,005, 2015
8 2015 Atomic layer deposition of HfxAlyCz as a work function material in metal gate MOS devices A Lee, N Fuchigami, D Pisharoty, Z Hong, E Haywood, A Joshi, ...
Journal of Vacuum Science & Technology A 32 (1), 2014
8 2014 Processing and characterization of GaSb/high-k dielectric interfaces E Hwang, C Eaton, S Mujumdar, H Madan, A Ali, D Bhatia, S Datta, ...
ECS Transactions 41 (5), 157, 2011
8 2011 Sacrificial Low Work Function Cap Layer S Mujumdar, A Joshi
US Patent App. 13/645,259, 2014
7 2014 Correlated Flicker Noise and Hole Mobility Characteristics of Uniaxially Strained SiGe FINFETs B Rajamohanan, I Ok, S Mujumdar, C Hobbs, P Majhi, R Jammy, S Datta
IEEE electron device letters 33 (9), 1237-1239, 2012
7 2012 Gate structures for transistor devices for CMOS applications and products Z Hong, S Tzeng, A Joshi, A Bodke, D Pisharoty, U Raghuram, O Karlsson, ...
US Patent 9,362,283, 2016
6 2016 Transition metal aluminate and high k dielectric semiconductor stack S Mujumdar
US Patent App. 13/723,853, 2014
5 2014 Metal-insulator-semiconductor (MIS) contact with controlled defect density S Mujumdar, A Joshi, K Kashefi, AS Lee, A Pethe, B Yang
US Patent App. 14/315,718, 2015
4 2015 Distributed substrate top contact for moscap measurements S Mujumdar, A Joshi
US Patent App. 13/544,710, 2014
4 2014 Semiconductor Device Metal-Insulator-Semiconductor Contacts with Interface Layers and Methods for Forming the Same A Joshi, S Barstow, P Besser, A Bodke, G Bouche, N Fuchigami, Z Hong, ...
US Patent App. 14/576,597, 2016
3 2016 Ieee International Electron Devices Meeting (IEDM) DK Mohata, R Bijesh, S Mujumdar, C Eaton, R Engel-Herbert, T Mayer, ...
Washington, DC, December, 2011
2 2011 Combining Materials in Different Components of Selector Elements of Integrated Circuits S Mujumdar, A Pethe, A Bodke, K Kashefi
US Patent App. 15/235,992, 2017
1 2017 Methods for removing a native oxide layer from germanium susbtrates in the fabrication of integrated circuits B Yang, A Pethe, A Lee, A Joshi, A Bodke, K Kashefi, S Mujumdar
US Patent App. 14/044,376, 2015
1 2015 Methods for removing a native oxide layer from germanium susbtrates in the fabrication of integrated circuitsi B Yang, S Liang, K Young-Fisher, K Kashefi, A Joshi, S Mujumdar, ...
US Patent App. 14/253,668, 2015
1 2015