Lateral drain-extended MOSFET having channel along sidewall of drain extension dielectric M Denison, TR Efland US Patent 7,888,732, 2011 | 89 | 2011 |
Moving current filaments in integrated DMOS transistors under short-duration current stress M Denison, M Blaho, P Rodin, V Dubec, D Pogany, D Silber, E Gornik, ... IEEE transactions on electron devices 51 (8), 1331-1339, 2004 | 65 | 2004 |
Symmetrical bi-directional semiconductor ESD protection device M Denison, P Hao US Patent 7,786,507, 2010 | 56 | 2010 |
Measurement and modeling of the electron impact-ionization coefficient in silicon up to very high temperatures S Reggiani, E Gnani, M Rudan, G Baccarani, C Corvasce, D Barlini, ... IEEE transactions on electron devices 52 (10), 2290-2299, 2005 | 55 | 2005 |
Physics-based analytical model for HCS degradation in STI-LDMOS transistors S Reggiani, S Poli, M Denison, E Gnani, A Gnudi, G Baccarani, ... IEEE transactions on electron devices 58 (9), 3072-3080, 2011 | 52 | 2011 |
Explanation of the rugged LDMOS behavior by means of numerical analysis S Reggiani, G Baccarani, E Gnani, A Gnudi, M Denison, S Pendharkar, ... IEEE Transactions on Electron devices 56 (11), 2811-2818, 2009 | 46 | 2009 |
Influence of inhomogeneous current distribution on the thermal SOA of integrated DMOS transistors M Denison, M Pfost, KW Pieper, S Märkl, D Metzner ISPSD'04 (proceedings of the 16th International Symposium on Power …, 2004 | 46 | 2004 |
Integrating multi-output power converters having vertically stacked semiconductor chips M Denison, BA Carpenter, OJ Lopez, JA Herbsommer, J Noquil US Patent 9,214,415, 2015 | 43 | 2015 |
Quasi-vertical gated NPN-PNP ESD protection device M Denison, P Hao US Patent 7,968,936, 2011 | 41 | 2011 |
Key technologies for system-integration in the automotive and industrial applications M Stecher, N Jensen, M Denison, R Rudolf, B Strzalkoswi, MN Muenzer, ... IEEE transactions on power electronics 20 (3), 537-549, 2005 | 40 | 2005 |
Experimental extraction of the electron impact-ionization coefficient at large operating temperatures S Reggiani, E Gnani, M Rudan, G Baccarani, C Corvasce, D Barlini, ... IEDM Technical Digest. IEEE International Electron Devices Meeting, 2004 …, 2004 | 38 | 2004 |
Characterization and modeling of electrical stress degradation in STI-based integrated power devices S Reggiani, G Barone, E Gnani, A Gnudi, G Baccarani, S Poli, R Wise, ... Solid-State Electronics 102, 25-41, 2014 | 37 | 2014 |
Field plate trench mosfet transistor with graded dielectric liner thickness M Denison, S Pendharkar, PL Hower, J Lin US Patent App. 12/426,717, 2010 | 36 | 2010 |
Moving current filaments in ESD protection devices and their relation to electrical characteristics D Pogány, S Bychikhin, E Gornik, M Denison, N Jensen, G Groos, ... 2003 IEEE International Reliability Physics Symposium Proceedings, 2003 …, 2003 | 34 | 2003 |
Lateral metal oxide semiconductor drain extension design M Denison, S Sridhar, S Pendharkar US Patent 7,847,351, 2010 | 33 | 2010 |
Hot spot dynamics in quasivertical DMOS under ESD stress M Denison, M Blaho, D Silber, J Joos, N Jensen, M Stecher, V Dubec, ... ISPSD'03. 2003 IEEE 15th International Symposium on Power Semiconductor …, 2003 | 32 | 2003 |
Thermally-driven motion of current filaments in ESD protection devices D Pogány, S Bychikhin, M Denison, P Rodin, N Jensen, G Groos, ... Solid-state electronics 49 (3), 421-429, 2005 | 28 | 2005 |
Investigation on the temperature dependence of the HCI effects in the rugged STI-based LDMOS transistor S Poli, S Reggiani, G Baccarani, E Gnani, A Gnudi, M Denison, ... 2010 22nd International Symposium on Power Semiconductor Devices & IC's …, 2010 | 25 | 2010 |
Lateral drain-extended MOSFET having channel along sidewall of drain extension dielectric M Denison, TR Efland US Patent 8,173,510, 2012 | 24 | 2012 |
Area efficient 3D integration of low noise JFET and MOS in linear bipolar CMOS process P Hao, M Denison US Patent 7,939,863, 2011 | 24 | 2011 |