Extracting secret keys from integrated circuits D Lim, JW Lee, B Gassend, GE Suh, M Van Dijk, S Devadas IEEE Transactions on Very Large Scale Integration (VLSI) Systems 13 (10 …, 2005 | 1283 | 2005 |
A technique to build a secret key in integrated circuits for identification and authentication applications JW Lee, D Lim, B Gassend, GE Suh, M Van Dijk, S Devadas 2004 Symposium on VLSI Circuits. Digest of Technical Papers (IEEE Cat. No …, 2004 | 1140 | 2004 |
Identification and authentication of integrated circuits B Gassend, D Lim, D Clarke, M Van Dijk, S Devadas Concurrency and Computation: Practice and Experience 16 (11), 1077-1098, 2004 | 403 | 2004 |
A 70GHz manufacturable complementary LC-VCO with 6.14 GHz tuning range in 65nm SOI CMOS DD Kim, J Kim, JO Plouchart, C Cho, W Li, D Lim, R Trzcinski, M Kumar, ... 2007 IEEE International Solid-State Circuits Conference. Digest of Technical …, 2007 | 86 | 2007 |
Variation DS Boning, K Balakrishnan, H Cai, N Drego, A Farahanchi, KM Gettings, ... IEEE Transactions on Semiconductor Manufacturing 21 (1), 63-71, 2008 | 56 | 2008 |
Performance variability of a 90GHz static CML frequency divider in 65nm SOI CMOS D Lim, J Kim, JO Plouchart, C Cho, D Kim, R Trzcinski, D Boning 2007 IEEE International Solid-State Circuits Conference. Digest of Technical …, 2007 | 48 | 2007 |
Method for transmitting adaptive multi-channel packet in power line communication system JT Kim, DH Lim US Patent 6,809,632, 2004 | 44 | 2004 |
Random numbers from metastability and thermal noise DC Ranasinghe, D Lim, S Devadas, D Abbott, PH Cole Electronics Letters 41 (16), 1, 2005 | 33 | 2005 |
Decomposition and analysis of process variability using constrained principal component analysis C Cho, DD Kim, J Kim, JO Plouchart, D Lim, S Cho, R Trzcinski IEEE Transactions on Semiconductor Manufacturing 21 (1), 55-62, 2008 | 30 | 2008 |
A low cost solution to authentication in passive RFID systems DC Ranasinghe, D Lim, PH Cole, S Devadas Auto-ID Labs, 2006 | 12 | 2006 |
Early prediction of product performance and yield via technology benchmark C Cho, DD Kim, J Kim, D Lim, S Cho 2008 IEEE Custom Integrated Circuits Conference, 205-208, 2008 | 10 | 2008 |
A low-power mmWave CML prescaler in 65nm SOI CMOS technology DD Kim, C Cho, J Kim, JO Plouchart, D Lim 2008 IEEE Compound Semiconductor Integrated Circuits Symposium, 1-4, 2008 | 9 | 2008 |
Performance and yield optimization of mm-wave PLL front-end in 65nm SOI CMOS D Lim, J Kim, JO Plouchart, D Kim, C Cho, DS Boning 2007 IEEE Radio Frequency Integrated Circuits (RFIC) Symposium, 525-528, 2007 | 8 | 2007 |
Physical unclonable functions and applications S Devadas, D Clarke, B Gassend, D Lim, J Lee, M van Dijk URl: http://people. csail. mit. edu/rudolph/Teaching/Lectures/Security …, 2007 | 8 | 2007 |
A 75GHz PLL front-end integration in 65nm SOI CMOS technology D Kim, J Kim, JO Plouchart, C Cho, D Lim, W Li, R Trzcinski 2007 IEEE Symposium on VLSI Circuits, 174-175, 2007 | 6 | 2007 |
Packet communication method of powerline communication system JT Kim, DH Lim US Patent 6,894,603, 2005 | 5 | 2005 |
An integrable low-cost hardware random number generator DC Ranasinghe, D Lim, S Devadas, B Jamali, Z Zhu, PH Cole Smart Structures, Devices, and Systems II 5649, 627-639, 2005 | 5 | 2005 |
A Data-Driven Statistical Approach to Analyzing Process Variation in 65nm SOI Technology C Cho, D Kim, J Kim, JO Plouchart, D Lim, S Cho, R Trzcinski 8th International Symposium on Quality Electronic Design (ISQED'07), 699-702, 2007 | 3 | 2007 |
Exploiting metastability and thermal noise to build a reconfigurable hardware random number generator D Lim, DC Ranasinghe, S Devadas, B Jamali, D Abbott, PH Cole Noise in Devices and Circuits III 5844, 294-309, 2005 | 3 | 2005 |
Characterization of process variability and robust optimization of analog circuits D Lim Massachusetts Institute of Technology, 2008 | 1 | 2008 |