Jonathan Rose
Jonathan Rose
Professor of Electrical and Computer Engineering, University of Toronto
Verified email at ece.utoronto.ca - Homepage
Title
Cited by
Cited by
Year
Architecture and CAD for deep-submicron FPGAs
V Betz, J Rose, A Marquardt
Springer Science & Business Media, 1999
1605*1999
Measuring the gap between FPGAs and ASICs
I Kuon, J Rose
IEEE Transactions on computer-aided design of integrated circuits and …, 2007
15282007
VPR: A new packing, placement and routing tool for FPGA research
V Betz, J Rose
International Workshop on Field Programmable Logic and Applications, 213-222, 1997
13891997
Field-Programmable Gate Arrays
S Brown, R Francis, J Rose, Z Vranesic
Kluwer/Springer, ISBN 978-0-7923-9248-4, 1992
11881992
FPGA and CPLD architectures: A tutorial
S Brown, J Rose
IEEE design & test of computers 13 (2), 42-57, 1996
789*1996
The effect of LUT and cluster size on deep-submicron FPGA performance and density
E Ahmed, J Rose
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 12 (3), 288-298, 2004
7472004
FPGA architecture: Survey and challenges
I Kuon, R Tessier, J Rose
Now Publishers Inc, 2008
6782008
Architecture of field-programmable gate arrays
J Rose, A El Gamal, A Sangiovanni-Vincentelli
Proceedings of the IEEE 81 (7), 1013-1029, 1993
4731993
Architecture of field-programmable gate arrays: The effect of logic block functionality on area efficiency
J Rose, RJ Francis, D Lewis, P Chow
IEEE Journal of Solid-State Circuits 25 (5), 1217-1225, 1990
4281990
Chortle-crf: Fast technology mapping for lookup table-based FPGAs
R Francis, J Rose, Z Vranesic
Proceedings of the 28th ACM/IEEE Design Automation Conference, 227-233, 1991
3481991
Using cluster-based logic blocks and timing-driven packing to improve FPGA speed and density
A Marquardt, V Betz, J Rose
Proceedings of the 1999 ACM/SIGDA seventh international symposium on Field …, 1999
3301999
VTR 7.0: Next generation architecture and CAD system for FPGAs
J Luu, J Goeders, M Wainberg, A Somerville, T Yu, K Nasartschuk, M Nasr, ...
ACM Transactions on Reconfigurable Technology and Systems (TRETS) 7 (2), 1-30, 2014
3282014
Timing-driven placement for FPGAs
A Marquardt, V Betz, J Rose
Proceedings of the 2000 ACM/SIGDA eighth international symposium on Field …, 2000
3172000
The VTR project: architecture and CAD for FPGAs from verilog to routing
J Rose, J Luu, CW Yu, O Densmore, J Goeders, A Somerville, KB Kent, ...
Proceedings of the ACM/SIGDA international symposium on Field Programmable …, 2012
3012012
VPR 5.0: FPGA CAD and architecture exploration tools with single-driver routing, heterogeneity and process scaling
J Luu, I Kuon, P Jamieson, T Campbell, A Ye, WM Fang, K Kent, J Rose
ACM Transactions on Reconfigurable Technology and Systems (TRETS) 4 (4), 1-23, 2011
2942011
The stratixπ routing and logic architecture
D Lewis, V Betz, D Jefferson, A Lee, C Lane, P Leventis, S Marquardt, ...
Proceedings of the 2003 ACM/SIGDA eleventh international symposium on Field …, 2003
2942003
Flexibility of interconnection structures for field-programmable gate arrays
J Rose, S Brown
IEEE Journal of Solid-State Circuits 26 (3), 277-282, 1991
2881991
A detailed router for field-programmable gate arrays
S Brown, J Rose, ZG Vranesic
IEEE transactions on computer-aided design of integrated circuits and …, 1992
2311992
Chortle: A technology mapping program for lookup table-based field programmable gate arrays
RJ Francis, J Rose, K Chung
Proceedings of the 27th ACM/IEEE Design Automation Conference, 613-619, 1991
2301991
The Stratix II logic and routing architecture
D Lewis, E Ahmed, G Baeckler, V Betz, M Bourgeault, D Cashman, ...
Proceedings of the 2005 ACM/SIGDA 13th international symposium on Field …, 2005
2252005
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