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Bahram Rashidi
Bahram Rashidi
Associate Professor at Ayatollah Boroujerdi University
Verified email at abru.ac.ir - Homepage
Title
Cited by
Cited by
Year
FPGA based fast and high-throughput 2-slow retiming 128-bit AES encryption algorithm
RR Farashahi, B Rashidi, SM Sayedi
Microelectronics Journal 45 (8), 1014-1025, 2014
702014
Design and implementation of low power digital FIR filter based on low power multipliers and adders on Xilinx FPGA
B Rashidi, B Rashidi, M Pourormazd
2011 3rd International Conference on Electronics Computer Technology 2, 18-22, 2011
542011
High-speed Hardware Architecture of Scalar Multiplication for Binary Elliptic Curve Cryptosystems
B Rashidi, SM Sayedi, RR Farashahi
Microelectronics Journal 52, 49–65, 2016
442016
A Survey on Hardware Implementations of Elliptic Curve Cryptosystems
B Rashidi
arXiv preprint arXiv:1710.08336, 2017
382017
High-performance and High-speed implementation of Polynomial basis Itoh-Tsujii Inversion algorithm over GF(2m)
B Rashidi, RR Farashahi, SM Sayedi
IET Information Security 11 (2), 66-77, 2016
312016
A novel approach to determining piezoelectric properties of nanogenerators based on PVDF nanofibers using iterative finite element simulation for walking energy harvesting
M Kashfi, P Fakhri, B Amini, N Yavari, B Rashidi, L Kong, R Bagherzadeh
Journal of Industrial Textiles, 2020
282020
A High Speed and Low Power Image Encryption with 128-Bit AES Algorithm
GH Karimian, B Rashidi
International Journal of Computer and Electrical Engineering 4 (3), 367, 2012
282012
Efficient and Low-complexity Hardware Architecture of Gaussian Normal Basis Multiplication over GF(2m) for Elliptic Curve Cryptosystems
B Rashidi, SM Sayedi, RR Farashahi
IET Circuits, Devices & Systems 10 (4), 2016
262016
Flexible Structures of Lightweight Block Ciphers PRESENT, SIMON and LED
B Rashidi
IET Circuits, Devices & Systems 14 (3), 2020
252020
High performance and low-power finite impulse response filter based on ring topology with modified retiming serial multiplier on FPGA
B Rashidi
IET Signal Processing 7 (8), 743-753, 2013
232013
High Performance FPGA Based Digital Space Vector PWM Three Phase Voltage Source Inverter
B Rashidi, M Sabahi
International Journal of Modern Education and Computer Science 5 (1), 62, 2013
232013
Compact and Efficient structure of 8-bit S-box for lightweight cryptography
B Rashidi
Integration, the VLSI Journal 76, 172-182, 2021
222021
Implementation of an optimized and pipelined combinational logic rijndael S-Box on FPGA
B Rashidi, B Rashidi
International Journal of Computer Network & Information Security 5 (1), 41-48, 2013
222013
High-throughput and Flexible ASIC Implementations of SIMON and SPECK Lightweight Block Ciphers
B Rashidi
International Journal of Circuit Theory and Applications 47 (8), 2019
172019
High-throughput and lightweight hardware structures of HIGHT and PRESENT block ciphers
B Rashidi
Microelectronics Journal 90, 232-252, 2019
162019
Low-cost and Two-cycle Hardware Structures of PRINCE Lightweight Block Cipher
B Rashidi
International Journal of Circuit Theory and Applications 48 (8), 2020
132020
Efficient and Flexible Hardware Structures of the 128-bit CLEFIA Block Cipher
B Rashidi
IET Computers & Digital Techniques 14 (2), 69-79, 2019
132019
Efficient and high-throughput application-specific integrated circuit implementations of HIGHT and PRESENT block ciphers
B Rashidi
IET Circuits, Devices & Systems 13 (6), 731-740, 2019
132019
FPGA Based A New Low Power and Self-Timed AES 128-bit Encryption Algorithm for Encryption Audio Signal
B Rashidi, B Rashidi
International Journal of Computer Network and Information Security 5 (2), 10, 2013
132013
Low Power FPGA Implementation of Digital FIR Filter Based on Low Power Multiplexer Base Shift/Add Multiplier
MP Bahram Rashidi, Farshad Mirzaei, Bahman Rashidi
International Journal of Computer Theory and Engineering 5 (2), 346 - 350, 2013
132013
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