Efficient design and implementation on FPGA of a MicroBlaze peripheral for processing direct electrical networks measurements J Viejo, MJ Bellido, A Millán, E Ostúa, J Juan, P Ruiz-de-Clavijo, ... 2006 International Symposium on Industrial Embedded Systems, 1-7, 2006 | 12 | 2006 |
Embedded LUKS (E-LUKS): a hardware solution to IoT security G Cano-Quiveu, P Ruiz-de-clavijo-Vazquez, MJ Bellido, J Juan-Chico, ... Electronics 10 (23), 3036, 2021 | 9 | 2021 |
Minimalistic SDHC-SPI hardware reader module for boot loader applications P Ruiz-de-Clavijo, E Ostúa, MJ Bellido, J Juan, J Viejo, D Guerrero Microelectronics journal 67, 32-37, 2017 | 6 | 2017 |
Application of internode model to global power consumption estimation in SCMOS gates A Millán Calderón, MJ Bellido Díaz, J Juan-Chico, P Ruiz de Clavijo, ... International Workshop on Power and Timing Modeling, Optimization and …, 2005 | 5 | 2005 |
Signal sampling based transition modeling for digital gates characterization A Millán, J Juan, MJ Bellido, P Ruiz-de-Clavijo, D Guerrero, E Ostúa International Workshop on Power and Timing Modeling, Optimization and …, 2004 | 4 | 2004 |
An Integrated Digital System Design Framework With On-Chip Functional Verification and Performance Evaluation G Cano-Quiveu, P Ruiz-De-Clavijo-Vazquez, MJ Bellido-Diaz, ... IEEE Access 9, 161383-161394, 2021 | 3 | 2021 |
Logic-level fast current simulation for digital cmos circuits P Ruiz de Clavijo, J Juan-Chico, MJ Bellido Díaz, A Millán Calderón, ... International Workshop on Power and Timing Modeling, Optimization and …, 2005 | 3 | 2005 |
Using the complement of the cosine to compute trigonometric functions D Guerrero Martos, A Millán Calderón, J Juan Chico, J Viejo Cortés, ... EURASIP Journal on Advances in Signal Processing 2020, 1-21, 2020 | 2 | 2020 |
Building a basic membrane computer A Millan, J Viejo, J Quiros, MJ Bellido, D Guerrero, E Ostua 14th Brainstorming Week on Membrane Computing, 269, 2016 | 1 | 2016 |
NanoBoot: A Field-Programmable Gate Array/System-on-Chip Hardware Boot Loader for IoT Devices P Ruiz de Clavijo Vázquez, G Cano Quiveu, J Juan Chico, ... MDPI, 2024 | | 2024 |
YASAC: Yet Another Simple Academic Computer and Teaching Methodology J Juan-Chico, DG Martos, IM Gómez-González, JV Cortés 2024 XVI Congreso de Tecnología, Aprendizaje y Enseñanza de la Electrónica …, 2024 | | 2024 |
Dispositivo electrónico calculador de funciones trigonométricas y usos del mismo D Guerrero Martos, A Millán Calderón, J Juan Chico, J Viejo Cortés, ... Oficina Española de Patentes y Marcas (OEPM), 2021 | | 2021 |
Address encoded byte order D Guerrero Martos, G Cano Quiveu, J Juan Chico, A Millán Calderón, ... Microprocessors and Microsystems, 78 (103268), 2020 | | 2020 |
High-Performance Time Server Core for FPGA System-on-Chip J Viejo Cortés, J Juan Chico, MJ Bellido Díaz, P Ruiz de Clavijo Vázquez, ... | | 2019 |
Circuito electrónico digital para el cálculo de senos y cosenos de múltiplos de un ángulo D Guerrero Martos, J Viejo Cortés, P Ruiz de Clavijo Vázquez, ... Oficina Española de Patentes y Marcas (OEPM), 2018 | | 2018 |
Circuito electrónico digital para el cálculo de senos y cosenos de múltiplos de un ángulo DG MARTOS, JV CORTÉS, PRDEC VÁZQUEZ, JJ CHICO, MJB DÍAZ, ... | | 2018 |
Minimalistic SDHC-SPI hardware reader module for boot loader applications P Ruiz de Clavijo Vázquez, E Ostúa Arangüena, MJ Bellido Díaz, ... Microelectronics Journal, 67 (september 2017), 32-37., 2017 | | 2017 |
Building a basic membrane computer A Millán Calderón, J Viejo Cortés, J Quirós Carmona, MJ Bellido Díaz, ... BWMC 2016: 14th Brainstorming Week on Membrane Computing: Sevilla, ETS de …, 2016 | | 2016 |
evercodeML: a formal language for SoC integration JI Villar de Ossorno, J Juan Chico, D Guerrero Martos, MJ Bellido Díaz, ... ESLsyn: 2015 Electronic System Level Synthesis Conference (2015)., 2015 | | 2015 |
NanoFS: a hardware-oriented file system P Ruiz de Clavijo Vázquez, E Ostúa Arangüena, J Juan Chico, ... Electronics Letters, 49 (19), 1216-1218., 2013 | | 2013 |