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Juan P. Oliver
Juan P. Oliver
Universidad de la República, Uruguay
Dirección de correo verificada de fing.edu.uy
Título
Citado por
Citado por
Año
Lab at home: Hardware kits for a digital design lab
JP Oliver, F Haim
IEEE Transactions on education 52 (1), 46-51, 2008
882008
Clock gating and clock enable for FPGA power reduction
JP Oliver, J Curto, D Bouvier, M Ramos, E Boemo
2012 VIII Southern Conference on Programmable Logic, 1-5, 2012
582012
Wireless EEG system achieving high throughput and reduced energy consumption through lossless and near-lossless compression
GD y Alvarez, F Favaro, F Lecumberry, Á Martín, JP Oliver, J Oreggioni, ...
IEEE transactions on biomedical circuits and systems 12 (1), 231-241, 2018
292018
Power estimations vs. power measurements in Cyclone III devices
JP Oliver, E Boemo
2011 VII southern conference on Programmable Logic (SPL), 87-90, 2011
212011
Power estimations vs. power measurements in Spartan-6 devices
JP Oliver, JP Acle, E Boemo
2014 IX southern conference on Programmable Logic (SPL), 1-5, 2014
162014
Tracking the pipelining-power rule along the FPGA technical literature
E Boemo, JP Oliver, G Caffarena
Proceedings of the 10th FPGAworld Conference, 1-5, 2013
162013
Wearable EEG via lossless compression
G Dufort, F Favaro, F Lecumberry, Á Martín, JP Oliver, J Oreggioni, ...
2016 38th annual international conference of the IEEE engineering in …, 2016
152016
Hardware lab at home possible with ultra low cost boards [logic design course]
JP Oliver, F Haim, S Fernandez, J Rodríguez, P Rolando
2005 IEEE International Conference on Microelectronic Systems Education (MSE …, 2005
152005
Self-reconfigurable constant multiplier for fpga
J Hormigo, G Caffarena, JP Oliver, E Boemo
ACM Transactions on Reconfigurable Technology and Systems (TRETS) 6 (3), 1-17, 2013
92013
SIMENERG: The Design of Autonomous Systems
C Briozzo, G Casaravilla, R Chaer, JP Oliver
World Renewable Energy Congress, Denver, EEUU, 1996
81996
Exploring fpga Optimizations to Compute Sparse Numerical Linear Algebra Kernels
F Favaro, E Dufrechou, P Ezzatti, JP Oliver
Applied Reconfigurable Computing. Architectures, Tools, and Applications …, 2020
72020
Understanding the performance of elementary NLA kernels in fpgas
F Favaro, JP Oliver, E Dufrechou, P Ezzatti
2020 IEEE International Parallel and Distributed Processing Symposium …, 2020
62020
Diseño digital utilizando lógica programable: aplicaciones a la enseñanza
JP Oliver
62007
Time-Power-Energy Balance of blas Kernels in Modern fpgas
F Favaro, E Dufrechou, JP Oliver, P Ezzatti
Latin American High Performance Computing Conference, 78-89, 2022
42022
Energy-efficient algebra kernels in FPGA for High Performance Computing
F Favaro, E Dufrechou, P Ezzatti, JP Oliver
Journal of Computer Science & Technology 21, 2021
42021
Optimizing the performance of the sparse matrix–vector multiplication kernel in FPGA guided by the roofline model
F Favaro, E Dufrechou, JP Oliver, P Ezzatti
Micromachines 14 (11), 2030, 2023
32023
A drawing robot pipeline with artist-inspired execution
J Arruti, M Ottavianelli, A Solari, P Monzón, P Musé, JP Oliver
2021 IEEE URUCON, 461-466, 2021
32021
A low cost system for self measurements of power consumption in field programmable gate arrays
JP Oliver, F Veirano, D Bouvier, E Boemo
Journal of Low Power Electronics 13 (1), 1-9, 2017
32017
Técnicas de bajo consumo en FPGAs
JP Oliver
32014
Implementation of Adaptive Logic Networks on an FPGA board
JP Oliver, AF de Oliveira, JP Acle, RJ de la Vega, RM Canetti
Configurable computing: technology and applications 3526, 264-273, 1998
31998
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Artículos 1–20