| Concurrent and simple digital controller of an AC/DC converter with power factor correction based on an FPGA A de Castro, P Zumel, O García, T Riesgo, J Uceda IEEE Transactions on Power Electronics 18 (1), 334-343, 2003 | 205 | 2003 |
| Smart parking service based on wireless sensor networks J Yang, J Portilla, T Riesgo IECON 2012-38th Annual Conference on IEEE Industrial Electronics Society …, 2012 | 161 | 2012 |
| The extreme edge at the bottom of the Internet of Things: A review J Portilla, G Mujica, JS Lee, T Riesgo IEEE Sensors Journal 19 (9), 3179-3190, 2019 | 134 | 2019 |
| Design methodologies based on hardware description languages T Riesgo, Y Torroja, E De la Torre IEEE Transactions on Industrial electronics 46 (1), 3-12, 1999 | 134 | 1999 |
| A modular architecture for nodes in wireless sensor networks. J Portilla, A De Castro, E De La Torre, T Riesgo J. Univers. Comput. Sci. 12 (3), 328-339, 2006 | 114 | 2006 |
| FPGA-Based High-Performance Embedded Systems for Adaptive Edge Computing in Cyber-Physical Systems: The ARTICo3 Framework A Rodríguez, J Valverde, J Portilla, A Otero, T Riesgo, E De la Torre Sensors 18 (6), 1877, 2018 | 104 | 2018 |
| Embedded runtime reconfigurable nodes for wireless sensor networks applications YE Krasteva, J Portilla, E de la Torre, T Riesgo IEEE Sensors Journal 11 (9), 1800-1810, 2011 | 95 | 2011 |
| Wireless sensor network for environmental monitoring: application in a coffee factory J Valverde, V Rosello, G Mujica, J Portilla, A Uriarte, T Riesgo International Journal of Distributed Sensor Networks 8 (1), 638067, 2011 | 91 | 2011 |
| Using SRAM based FPGAs for power-aware high performance wireless sensor networks J Valverde, A Otero, M Lopez, J Portilla, E De la Torre, T Riesgo Sensors 12 (3), 2667-2692, 2012 | 75 | 2012 |
| Self-reconfigurable evolvable hardware system for adaptive image processing R Salvador, A Otero, J Mora, E de la Torre, T Riesgo, L Sekanina IEEE transactions on computers 62 (8), 1481-1493, 2013 | 73 | 2013 |
| Adaptable security in wireless sensor networks by using reconfigurable ECC hardware coprocessors J Portilla, A Otero, E de la Torre, T Riesgo, O Stecklina, S Peter, ... International Journal of Distributed Sensor Networks 6 (1), 740823, 2010 | 67 | 2010 |
| Concurrent and simple digital controller of an AC/DC converter with power factor correction P Zumel, A De Castro, O Garcia, T Riesgo, J Uceda APEC. Seventeenth Annual IEEE Applied Power Electronics Conference and …, 2002 | 64 | 2002 |
| Virtex II FPGA bitstream manipulation: Application to reconfiguration control systems YE Krasteva, E De La Torre, T Riesgo, D Joly 2006 International Conference on Field Programmable Logic and Applications, 1-4, 2006 | 62 | 2006 |
| Fault tolerance analysis and self-healing strategy of autonomous, evolvable hardware systems R Salvador, A Otero, J Mora, E de la Torre, L Sekanina, T Riesgo 2011 International Conference on Reconfigurable Computing and FPGAs, 164-169, 2011 | 61 | 2011 |
| A fast emulation-based NoC prototyping framework YE Krasteva, F Criado, E de la Torre, T Riesgo 2008 International Conference on Reconfigurable Computing and FPGAs, 211-216, 2008 | 54 | 2008 |
| Remote HW-SW reconfigurable wireless sensor nodes YE Krasteva, J Portilla, JM Carnicer, E De La Torre, T Riesgo 2008 34th Annual Conference of IEEE Industrial Electronics, 2483-2488, 2008 | 52 | 2008 |
| Straight method for reallocation of complex cores by dynamic reconfiguration in Virtex II FPGAs YE Krasteva, AB Jimeno, E de la Torre, T Riesgo 16th IEEE International Workshop on Rapid System Prototyping (RSP'05), 77-83, 2005 | 52 | 2005 |
| Dreams: A tool for the design of dynamically reconfigurable embedded and modular systems A Otero, E de la Torre, T Riesgo 2012 International Conference on Reconfigurable Computing and FPGAs, 1-8, 2012 | 46 | 2012 |
| A reconfigurable fpga-based architecture for modular nodes in wireless sensor networks J Portilla, T Riesgo, A De Castro 2007 3rd Southern Conference on Programmable Logic, 203-206, 2007 | 45 | 2007 |
| Reconfigurable hardware architecture of a shape recognition system based on specialized tiny neural networks with online training F Moreno, J Alarcón, R Salvador, T Riesgo IEEE Transactions on Industrial Electronics 56 (8), 3253-3263, 2009 | 39 | 2009 |
Eduardo de la TorreUniversidad Politécnica de MadridDirección de correo verificada de upm.es
