Yoav Etsion
Title
Cited by
Cited by
Year
Backfilling using system-generated predictions rather than user runtime estimates
D Tsafrir, Y Etsion, DG Feitelson
IEEE Transactions on Parallel and Distributed Systems 18 (6), 789-803, 2007
4022007
System noise, OS clock ticks, and fine-grained parallel applications
D Tsafrir, Y Etsion, DG Feitelson, S Kirkpatrick
Proceedings of the 19th annual international conference on Supercomputing …, 2005
1712005
Task superscalar: An out-of-order task pipeline
Y Etsion, F Cabarcas, A Rico, A Ramirez, RM Badia, E Ayguade, ...
2010 43rd Annual IEEE/ACM International Symposium on Microarchitecture, 89-100, 2010
141*2010
Modeling user runtime estimates
D Tsafrir, Y Etsion, DG Feitelson
Workshop on Job Scheduling Strategies for Parallel Processing, 1-35, 2005
1382005
A short survey of commercial cluster batch schedulers
Y Etsion, D Tsafrir
School of Computer Science and Engineering, The Hebrew University of …, 2005
1092005
Didi: Mitigating the performance impact of tlb shootdowns using a shared tlb directory
C Villavieja, V Karakostas, L Vilanova, Y Etsion, A Ramirez, A Mendelson, ...
2011 International Conference on Parallel Architectures and Compilation …, 2011
962011
Trace-driven simulation of multithreaded applications
A Rico, A Duran, F Cabarcas, Y Etsion, A Ramirez, M Valero
(IEEE ISPASS) IEEE International Symposium on Performance Analysis of …, 2011
832011
Effects of clock resolution on the scheduling of interactive and soft real-time processes
Y Etsion, D Tsafrir, DG Feitelson
Proceedings of the 2003 ACM SIGMETRICS international conference on …, 2003
64*2003
On the simulation of large-scale architectures using multiple application abstraction levels
A Rico, F Cabarcas, C Villavieja, M Pavlovic, A Vega, Y Etsion, A Ramirez, ...
ACM Transactions on Architecture and Code Optimization (TACO) 8 (4), 1-20, 2012
602012
Secretly Monopolizing the CPU Without Superuser Privileges.
D Tsafrir, Y Etsion, DG Feitelson
USENIX Security Symposium, 239-256, 2007
532007
L1 cache filtering through random selection of memory references
Y Etsion, DG Feitelson
16th International Conference on Parallel Architecture and Compilation …, 2007
47*2007
Process prioritization using output production: scheduling for multimedia
Y Etsion, D Tsafrir, DG Feitelson
ACM Transactions on Multimedia Computing, Communications, and Applications …, 2006
44*2006
Single-graph multiple flows: Energy efficient design alternative for GPGPUs
D Voitsechov, Y Etsion
ACM SIGARCH computer architecture news 42 (3), 205-216, 2014
432014
Hybrid dataflow/von-Neumann architectures
F Yazdanpanah, C Alvarez-Martinez, D Jimenez-Gonzalez, Y Etsion
IEEE Transactions on Parallel and Distributed Systems 25 (6), 1489-1509, 2013
402013
CODOMs: Protecting software with code-centric memory domains
L Vilanova, M Ben-Yehuda, N Navarro, Y Etsion, M Valero
ACM SIGARCH Computer Architecture News 42 (3), 469-480, 2014
362014
Desktop scheduling: how can we know what the user wants?
Y Etsion, D Tsafrir, DG Feitelson
Proceedings of the 14th international workshop on Network and operating …, 2004
362004
Semantic locality and context-based prefetching using reinforcement learning
L Peled, S Mannor, U Weiser, Y Etsion
2015 ACM/IEEE 42nd Annual International Symposium on Computer Architecture …, 2015
322015
User-level communication in a system with gang scheduling
Y Etsion, DG Feitelson
Proceedings 15th International Parallel and Distributed Processing Symposium …, 2000
28*2000
Fine grained kernel logging with klogger: Experience and insights
Y Etsion, D Tsafrir, S Kirkpatrick, DG Feitelson
Proceedings of the 2nd ACM SIGOPS/EuroSys European Conference on Computer …, 2007
262007
Scalable simulation of decoupled accelerator architectures
A Rico, F Cabarcas, A Quesada, M Pavlovic, AJ Vega, C Villavieja, ...
Universitat Politecnica de Catalunya, Tech. Rep. UPCDAC-RR-2010-14, 2010
242010
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Articles 1–20