| Method for fabricating semiconductor devices with reduced junction diffusion B Colombeau, SH Yeong, F Benistant, B Indajang, L Chan US Patent 8,053,340, 2011 | 102 | 2011 |
| Method for fabricating semiconductor devices with reduced junction diffusion B Colombeau, SH Yeong, F Benistant, B Indajang, L Chan US Patent 8,354,321, 2013 | 94 | 2013 |
| Semiconductor structure with fin structure and wire structure and method for forming the same TY Wen, SH Yeong, BY Lai, SC Wang US Patent 9,450,046, 2016 | 53 | 2016 |
| Semiconductor device and manufacturing method thereof CH Yu, SC Wang, SH Yeong US Patent 9,659,930, 2017 | 46 | 2017 |
| Semiconductor device and a method for fabricating the same JY Lai, RG Liu, SH Yeong, YM Chen, YS Yen, YY Chen US Patent 11,088,030, 2021 | 41 | 2021 |
| Dendrimer-encapsulated Pt nanoparticles in supercritical medium: Synthesis, characterization, and application to device fabrication SR Puniredd, CM Yin, YS Hooi, PS Lee, MP Srinivasan Journal of colloid and interface science 332 (2), 505-510, 2009 | 33 | 2009 |
| Characterization of fatigue and its recovery behavior in ferroelectric HfZrO PJ Liao, YK Chang, YH Lee, YM Lin, SH Yeong, RL Hwang, V Hou, ... 2021 Symposium on VLSI Technology, 1-2, 2021 | 32 | 2021 |
| Method for fabricating nano devices TAN Dexter, KL Pey, SH Yeong, YK Chin, KK Ong, CM Ng US Patent 8,338,280, 2012 | 31 | 2012 |
| Semiconductor device and manufacturing method thereof CH Yu, SC Wang, SH Yeong US Patent 9,954,076, 2018 | 27 | 2018 |
| Source and drain formation technique for fin-like field effect transistor YD Chiou, WY Lu, CI Kuo, SH Yeong, YM Chen US Patent 10,510,762, 2019 | 24 | 2019 |
| Barrier layer above anti-punch through (APT) implant region to improve mobility of channel region of fin field effect transistor (FinFET) device structure TY Wen, SC Wang, SH Yeong, HC Sung, YY Cheng US Patent 9,953,836, 2018 | 24 | 2018 |
| FinFET transistor with u-shaped channel TY Wen, MN Wang, SH Yeong US Patent 9,893,191, 2018 | 24 | 2018 |
| Stable organic monolayers on oxide-free silicon/germanium in a supercritical medium: a new route to molecular electronics SR Puniredd, S Jayaraman, SH Yeong, C Troadec, MP Srinivasan The Journal of Physical Chemistry Letters 4 (9), 1397-1403, 2013 | 23 | 2013 |
| Semiconductor device having a uniform and thin silicide layer on an epitaxial source/drain structure and manufacturing method thereof LEE Kai-Hsuan, JC Sheu, SL Wang, CY Yang, SC Wang, SH Yeong US Patent 10,811,262, 2020 | 21 | 2020 |
| Methods for reducing contact resistance in semiconductors manufacturing process CY Yang, LEE Kai-Hsuan, SC Wang, SH Yeong, YF Pai, YM Chen US Patent 9,997,631, 2018 | 19 | 2018 |
| Self-aligned contact air gap formation LEE Kai-Hsuan, BY Lai, SH Yeong, FC Yang, YA Lin, YM Chen US Patent 10,923,565, 2021 | 18 | 2021 |
| Semiconductor device and manufacturing method thereof WY Lu, SH Yeong US Patent 10,325,911, 2019 | 18 | 2019 |
| The impact of nitrogen co-implantation on boron ultra-shallow junction formation and underlying physical understanding SH Yeong, B Colombeau, KRC Mok, F Benistant, CJ Liu, ATS Wee, ... Materials Science and Engineering: B 154, 43-48, 2008 | 18 | 2008 |
| Self-aligned gate hard mask and method forming same LEE Kai-Hsuan, BY Lai, SC Wang, SH Yeong, YM Chen, CO Chui US Patent 10,062,784, 2018 | 16 | 2018 |
| Fin field effect transistor (FinFET) device structure with Ge-doped inter-layer dielectric (ILD) structure TY Wen, YD Chiou, SC Wang, SH Yeong US Patent 9,425,317, 2016 | 16 | 2016 |
Francis BenistantTMAVerified email at mltma.com
