Yoongu Kim
Yoongu Kim
Graduate Student, Carnegie Mellon University
Verified email at cmu.edu - Homepage
Title
Cited by
Cited by
Year
Flipping bits in memory without accessing them: An experimental study of DRAM disturbance errors
Y Kim, R Daly, J Kim, C Fallin, JH Lee, D Lee, C Wilkerson, K Lai, O Mutlu
ACM SIGARCH Computer Architecture News 42 (3), 361-372, 2014
6292014
Thread cluster memory scheduling: Exploiting differences in memory access behavior
Y Kim, M Papamichael, O Mutlu, M Harchol-Balter
2010 43rd Annual IEEE/ACM International Symposium on Microarchitecture, 65-76, 2010
4582010
ATLAS: A scalable and high-performance scheduling algorithm for multiple memory controllers
Y Kim, D Han, O Mutlu, M Harchol-Balter
HPCA-16 2010 The Sixteenth International Symposium on High-Performance …, 2010
4582010
A case for exploiting subarray-level parallelism (SALP) in DRAM
Y Kim, V Seshadri, D Lee, J Liu, O Mutlu
2012 39th Annual International Symposium on Computer Architecture (ISCA …, 2012
2932012
Ramulator: A fast and extensible DRAM simulator
Y Kim, W Yang, O Mutlu
IEEE Computer architecture letters 15 (1), 45-49, 2015
2862015
An experimental study of data retention behavior in modern DRAM devices: Implications for retention time profiling mechanisms
J Liu, B Jaiyen, Y Kim, C Wilkerson, O Mutlu
ACM SIGARCH Computer Architecture News 41 (3), 60-71, 2013
2772013
Tiered-latency DRAM: A low latency and low cost DRAM architecture
D Lee, Y Kim, V Seshadri, J Liu, L Subramanian, O Mutlu
2013 IEEE 19th International Symposium on High Performance Computer …, 2013
2482013
RowClone: fast and energy-efficient in-DRAM bulk data copy and initialization
V Seshadri, Y Kim, C Fallin, D Lee, R Ausavarungnirun, G Pekhimenko, ...
Proceedings of the 46th Annual IEEE/ACM International Symposium on …, 2013
2352013
Improving DRAM performance by parallelizing refreshes with accesses
KKW Chang, D Lee, Z Chishti, AR Alameldeen, C Wilkerson, Y Kim, ...
2014 IEEE 20th International Symposium on High Performance Computer …, 2014
1782014
Adaptive-latency DRAM: Optimizing DRAM timing for the common-case
D Lee, Y Kim, G Pekhimenko, S Khan, V Seshadri, K Chang, O Mutlu
2015 IEEE 21st International Symposium on High Performance Computer …, 2015
1672015
MISE: Providing performance predictability and improving fairness in shared main memory systems
L Subramanian, V Seshadri, Y Kim, B Jaiyen, O Mutlu
2013 IEEE 19th International Symposium on High Performance Computer …, 2013
1632013
The efficacy of error mitigation techniques for DRAM retention failures: A comparative experimental study
S Khan, D Lee, Y Kim, AR Alameldeen, C Wilkerson, O Mutlu
ACM SIGMETRICS Performance Evaluation Review 42 (1), 519-532, 2014
1582014
Linearly compressed pages: a low-complexity, low-latency main memory compression framework
G Pekhimenko, V Seshadri, Y Kim, H Xin, O Mutlu, PB Gibbons, ...
Proceedings of the 46th Annual IEEE/ACM International Symposium on …, 2013
1312013
Architectural techniques to enhance DRAM scaling
Y Kim
PhD thesis, Carnegie Mellon University, 2015
402015
Linearly compressed pages: A main memory compression framework with low complexity and low latency
G Pekhimenko, TC Mowry, O Mutlu
2012 21st International Conference on Parallel Architectures and Compilation …, 2012
362012
RowClone: Fast and efficient In-DRAM copy and initialization of bulk data
V Seshadri, Y Kim, C Fallin, D Lee, R Ausavarungnirun, G Pekhimenko, ...
252013
Thread cluster memory scheduling
Y Kim, M Papamichael, O Mutlu, M Harchol-Balter
IEEE micro 31 (1), 78-89, 2011
162011
Rowhammer: Reliability analysis and security implications
Y Kim, R Daly, J Kim, C Fallin, JH Lee, D Lee, C Wilkerson, K Lai, O Mutlu
arXiv preprint arXiv:1603.00747, 2016
132016
Predictable performance and fairness through accurate slowdown estimation in shared main memory systems
L Subramanian, V Seshadri, Y Kim, B Jaiyen, O Mutlu
arXiv preprint arXiv:1805.05926, 2018
62018
Memory systems
Y Kim, O Mutlu
Carnegie Mellon University, 2014
62014
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Articles 1–20