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Mohit Mamodia
Mohit Mamodia
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Verified email at intel.com
Title
Cited by
Cited by
Year
Die-stacking using through-silicon vias on bumpless build-up layer substrates including embedded-dice, and processes of forming same
JS Guzek, RK Nalla, JS Gonzalez, D Delaney, S Pothukuchi, M Mamodia, ...
US Patent 8,786,066, 2014
572014
Effect of microdomain structure and process conditions on the mechanical behavior of cylindrical block copolymer systems
M Mamodia, A Panday, SP Gido, AJ Lesser
Macromolecules 40 (20), 7320-7328, 2007
232007
Forming die backside coating structures with coreless packages
RN Manepalli, M Mamodia, D Xu, JS Gonzalez, ER Prack
US Patent 8,466,559, 2013
182013
Hierarchical description of deformation in block copolymer tpes
M Mamodia, K Indukuri, ET Atkins, WH De Jeu, AJ Lesser
Journal of materials science 43, 7035-7046, 2008
182008
Coating for a microelectronic device, treatment comprising same, and method of managing a thermal profile of a microelectronic die
D Xu, LR Arana, NR Raravikar, M Mamodia, R Swaminathan, R Manepalli
US Patent 8,287,996, 2012
132012
Polymeric compositions, methods of manufacture thereof and articles comprising the same
AJ Lesser, NK Singh, M Mamodia
US Patent 8,227,551, 2012
52012
Integrated circuit packages with patterned protective material
K Yazzie, NS Yagnamurthy, P Malatkar, CP Chiu, M Mamodia, MJ Gallina, ...
US Patent 10,957,656, 2021
42021
Bicontinuous porous ceramic composite for semiconductor package applications
T Gaines, M Mamodia, P Start, K Hackenberg
US Patent App. 15/859,483, 2019
32019
Stiffener tape for electronic assembly
X Brun, A Krishnan, M Mamodia, D Xu
US Patent 9,793,151, 2017
22017
Treatment for a microelectronic device and method of resisting damage to a microelectronic device using same
L Arana, D Xu, V Wakharkar, W Feng, N Chakrapani, ...
US Patent 8,304,065, 2012
22012
Probe pins with etched tips for electrical die test
JD Stanford, D Craig, TP Albertson, M Mamodia, D Xu
US Patent 10,598,696, 2020
12020
Thermal head with a thermal barrier for integrated circuit die processing
M Mamodia, K Yazzie, D Xu, K Liu, PJ Diglio, P Malatkar
US Patent 10,499,461, 2019
12019
Coating for a microelectronic device, treatment comprising same, and method of managing a thermal profile of a microelectronic die
D Xu, LR Arana, NR Raravikar, M Mamodia, R Swaminathan, R Manepalli
US Patent 8,569,108, 2013
12013
EFFECT OF PROCESS CONDITIONS ON THE MICRO-DOMAIN STRUCTURE AND MECHANICAL BEHAVIOR OF CYLINDRICAL BLOCK COPOLYMER SYSTEMS
M Mamodia, A Lesser
ANTEC-CONFERENCE PROCEEDINGS- 3, 1772, 2007
12007
Probe pins with etched tips for electrical die test
JD Stanford, D Craig, TP Albertson, M Mamodia, D Xu
US Patent 11,340,258, 2022
2022
Package with cathodic protection for corrosion mitigation
K Yazzie, M Mamodia
US Patent 10,998,275, 2021
2021
Structures to mitigate contamination on a back side of a semiconductor substrate
XF Brun, S Agrawal, H Wu, M Mamodia, SE Ou, H Shi
US Patent 9,698,108, 2017
2017
Adhesive with tunable adhesion for handling ultra-thin wafer
NR Raravikar, M Mamodia
US Patent App. 14/941,585, 2017
2017
Forming die backside coating structures with coreless packages
RN Manepalli, M Mamodia, D Xu, JS Gonzalez, ER Prack
US Patent 9,165,914, 2015
2015
Die-stacking using through-silicon vias on bumpless build-up layer substrates including embedded-dice, and processes of forming same
JS Guzek, RK Nalla, JS Gonzalez, D Delaney, S Pothukuchi, M Mamodia, ...
US Patent App. 14/333,110, 2014
2014
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