George Theodoridis
George Theodoridis
Assist. Prof., Electrical & Computer Eng., Univ. of Patras, Greece
Verified email at ece.upatras.gr
Title
Cited by
Cited by
Year
An efficient reconfigurable multiplier architecture for Galois field GF (2m)
P Kitsos, G Theodoridis, O Koufopavlou
Microelectronics Journal 34 (10), 975-980, 2003
1142003
A survey of coarse-grain reconfigurable architectures and cad tools
G Theodoridis, D Soudris, S Vassiliadis
Fine-and Coarse-Grain Reconfigurable Computing, 89-149, 2007
792007
A high-performance data path for synthesizing DSP kernels
MD Galanis, G Theodoridis, S Tragoudas, CE Goutis
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2006
632006
On the exploitation of a high-throughput SHA-256 FPGA design for HMAC
HE Michail, GS Athanasiou, V Kelefouras, G Theodoridis, CE Goutis
ACM Transactions on Reconfigurable Technology and Systems (TRETS) 5 (1), 1-28, 2012
292012
The ARISE approach for extending embedded processors with arbitrary hardware accelerators
N Vassiliadis, G Theodoridis, S Nikolaidis
IEEE transactions on very large scale integration (VLSI) systems 17 (2), 221-233, 2009
252009
High-speed FPGA implementation of secure hash algorithm for IPSec and VPN applications
AP Kakarountas, H Michail, A Milidonis, CE Goutis, G Theodoridis
The Journal of Supercomputing 37 (2), 179-195, 2006
252006
High throughput pipelined FPGA implementation of the new SHA-3 cryptographic hash algorithm
GS Athanasiou, GP Makkas, G Theodoridis
2014 6th International Symposium on Communications, Control and Signal …, 2014
232014
A RISC architecture extended by an efficient tightly coupled reconfigurable unit
N Vassiliadis, N Kavvadias, G Theodoridis, S Nikolaidis
International journal of electronics 93 (6), 421-438, 2006
222006
Switching activity estimation under real-gate delay using timed Boolean functions
G Theodoridis, S Theoharis, D Soudris, C Goutis
IEE Proceedings-Computers and Digital Techniques 147 (6), 444-450, 2000
172000
Design and implementation of totally-self checking SHA-1 and SHA-256 hash functions’ architectures
HE Michail, GS Athanasiou, G Theodoridis, A Gregoriades, CE Goutis
Microprocessors and Microsystems 45, 227-240, 2016
142016
A logic-based benders decomposition approach for mapping applications on heterogeneous multicore platforms
A Emeretlis, G Theodoridis, P Alefragis, N Voros
ACM Transactions on Embedded Computing Systems (TECS) 15 (1), 1-28, 2016
142016
High-speed FPGA implementation of the SHA-1 Hash function
AP Kakarountas, G Theodoridis, T Laopoulos, CE Goutis
2005 IEEE Intelligent Data Acquisition and Advanced Computing Systems …, 2005
142005
A novel high-speed counter with counting rate independent of the counter's length
AP Kakarountas, G Theodoridis, KS Papadomanolakis, C Goutis
10th IEEE International Conference on Electronics, Circuits and Systems …, 2003
142003
An integer linear programming model for mapping applications on hybrid systems
G Theodoridis, N Vassiliadis, S Nikolaidis
IET Computers & Digital Techniques 3 (1), 33-42, 2009
122009
Optimising the SHA-512 cryptographic hash function on FPGAs
GS Athanasiou, HE Michail, G Theodoridis, CE Goutis
IET Computers & Digital Techniques 8 (2), 70-82, 2013
112013
A partitioning methodology for accelerating applications in hybrid reconfigurable platforms
MD Galanis, A Milidonis, G Theodoridis, D Soudris, CE Goutis
Design, Automation and Test in Europe, 247-252, 2005
112005
On the development of high-throughput and area-efficient multi-mode cryptographic hash designs in FPGAs
HE Michail, GS Athanasiou, G Theodoridis, CE Goutis
Integration 47 (4), 387-407, 2014
102014
An automated development framework for a RISC processor with reconfigurable instruction set extensions
N Vassiliadis, G Theodoridis, S Nikolaidis
Proceedings 20th IEEE International Parallel & Distributed Processing …, 2006
102006
A reconfigurable coarse-grain data-path for accelerating computational intensive kernels
MD Galanis, G Theodoridis, S Tragoudas, CE Goutis
Journal of Circuits, Systems, and Computers 14 (04), 877-893, 2005
102005
Accurate Data Path Models for RT-Level Power Estimation
S Theoharis, G Theodoridis, D Soudris, C Goutis
International Workshop on Power and Timing Modeling, Optimization and …, 1998
91998
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Articles 1–20