Christopher L. Ayala
Title
Cited by
Cited by
Year
20 GHz operation of an asynchronous wave-pipelined RSFQ arithmetic-logic unit
TV Filippov, A Sahu, AF Kirichenko, IV Vernik, M Dorojevets, CL Ayala, ...
Physics Procedia 36, 59-65, 2012
702012
8-bit asynchronous wave-pipelined RSFQ arithmetic-logic unit
T Filippov, M Dorojevets, A Sahu, A Kirichenko, C Ayala, O Mukhanov
IEEE transactions on applied superconductivity 21 (3), 847-851, 2011
532011
8-bit asynchronous sparse-tree superconductor RSFQ arithmetic-logic unit with a rich set of operations
M Dorojevets, CL Ayala, N Yoshikawa, A Fujimaki
IEEE transactions on applied superconductivity 23 (3), 1700104-1700104, 2012
322012
16-bit wave-pipelined sparse-tree RSFQ adder
M Dorojevets, CL Ayala, N Yoshikawa, A Fujimaki
IEEE transactions on applied superconductivity 23 (3), 1700605-1700605, 2012
282012
Towards 32-bit energy-efficient superconductor RQL processors: the cell-level design and analysis of key processing and on-chip storage units
M Dorojevets, Z Chen, CL Ayala, AK Kasperek
IEEE Transactions on Applied Superconductivity 25 (3), 1-8, 2014
252014
Amorphous carbon active contact layer for reliable nanoelectromechanical switches
D Grogg, CL Ayala, U Drechsler, A Sebastian, WW Koelmans, SJ Bleiker, ...
2014 IEEE 27th international conference on micro electro mechanical systems …, 2014
232014
Data-flow microarchitecture for wide datapath RSFQ processors: Design study
M Dorojevets, CL Ayala, AK Kasperek
IEEE transactions on applied superconductivity 21 (3), 787-791, 2010
232010
Development and evaluation of design techniques for high-performance wave-pipelined wide datapath RSFQ processors
M Dorojevets, C Ayala, A Kasperek
Proc. ISEC, 46, 2009
182009
ColdFlux superconducting EDA and TCAD tools project: Overview and progress
CJ Fourie, K Jackman, MM Botha, S Razmkhah, P Febvre, CL Ayala, Q Xu, ...
IEEE Transactions on Applied Superconductivity 29 (5), 1-7, 2019
142019
HDL-based modeling approach for digital simulation of adiabatic quantum flux parametron logic
Q Xu, CL Ayala, N Takeuchi, Y Yamanashi, N Yoshikawa
IEEE Transactions on Applied Superconductivity 26 (8), 1-5, 2016
142016
Design and implementation of a 16-word by 1-bit register file using adiabatic quantum flux parametron logic
N Tsuji, CL Ayala, N Takeuchi, T Ortlepp, Y Yamanashi, N Yoshikawa
IEEE Transactions on Applied Superconductivity 27 (4), 1-4, 2017
132017
Analytical compact model in Verilog-A for electrostatically actuated ohmic switches
A Bazigos, CL Ayala, M Fernandez-Bolanos, Y Pu, D Grogg, C Hagleitner, ...
IEEE Transactions on Electron Devices 61 (6), 2186-2194, 2014
132014
Energy and latency optimization in NEM relay-based digital circuits
S Rana, T Qin, A Bazigos, D Grogg, M Despont, CL Ayala, C Hagleitner, ...
IEEE Transactions on Circuits and Systems I: Regular Papers 61 (8), 2348-2359, 2014
132014
Synthesis flow for cell-based adiabatic quantum-flux-parametron structural circuit generation with HDL back-end verification
Q Xu, CL Ayala, N Takeuchi, Y Murai, Y Yamanashi, N Yoshikawa
IEEE Transactions on Applied Superconductivity 27 (4), 1-5, 2017
112017
Nanoelectromechanical digital logic circuits using curved cantilever switches with amorphous-carbon-coated contacts
CL Ayala, D Grogg, A Bazigos, SJ Bleiker, M Fernandez-Bolanos, ...
Solid-State Electronics 113, 157-166, 2015
112015
A 6.7 MHz nanoelectromechanical ring oscillator using curved cantilever switches coated with amorphous carbon
CL Ayala, D Grogg, A Bazigos, MFB Badia, UT Duerig, M Despont, ...
2014 44th European Solid State Device Research Conference (ESSDERC), 66-69, 2014
102014
Majority-logic-optimized parallel prefix carry look-ahead adder families using adiabatic quantum-flux-parametron logic
CL Ayala, N Takeuchi, Y Yamanashi, T Ortlepp, N Yoshikawa
IEEE Transactions on Applied Superconductivity 27 (4), 1-7, 2016
92016
Design of an extremely energy-efficient hardware algorithm using adiabatic superconductor logic
Q Xu, Y Yamanashi, CL Ayala, N Takeuchi, T Ortlepp, N Yoshikawa
2015 15th International Superconductive Electronics Conference (ISEC), 1-3, 2015
92015
An adiabatic superconductor 8-bit adder with 24kBT energy dissipation per junction
N Takeuchi, T Yamae, CL Ayala, H Suzuki, N Yoshikawa
Applied Physics Letters 114 (4), 042602, 2019
72019
Development and demonstration of routing and placement EDA tools for large-scale adiabatic quantum-flux-parametron circuits
Y Murai, CL Ayala, N Takeuchi, Y Yamanashi, N Yoshikawa
IEEE Transactions on Applied Superconductivity 27 (6), 1-9, 2017
62017
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