| FPGAs and parallel architectures for aerospace applications F Kastensmidt, P Rech Soft errors and fault-tolerant design, 2016 | 62 | 2016 |
| Analyzing the impact of radiation-induced failures in programmable SoCs LA Tambara, P Rech, E Chielle, J Tonfat, FL Kastensmidt IEEE Transactions on Nuclear Science 63 (4), 2217-2224, 2016 | 50 | 2016 |
| Low power 3–2 and 4–2 adder compressors implemented using ASTRAN J Tonfat, R Reis 2012 IEEE 3rd Latin American Symposium on Circuits and Systems (LASCAS), 1-4, 2012 | 48 | 2012 |
| Analyzing the effectiveness of a frame-level redundancy scrubbing technique for SRAM-based FPGAs J Tonfat, FL Kastensmidt, P Rech, R Reis, HM Quinn IEEE transactions on nuclear science 62 (6), 3080-3087, 2015 | 46 | 2015 |
| Reliability on ARM processors against soft errors through SIHFT techniques E Chielle, F Rosa, GS Rodrigues, LA Tambara, J Tonfat, E Macchione, ... IEEE Transactions on Nuclear Science 63 (4), 2208-2216, 2016 | 45 | 2016 |
| On the reliability of linear regression and pattern recognition feedforward artificial neural networks in FPGAs F Libano, P Rech, L Tambara, J Tonfat, F Kastensmidt IEEE Transactions on Nuclear Science 65 (1), 288-295, 2017 | 39 | 2017 |
| Analyzing the influence of the angles of incidence and rotation on MBU events induced by low LET heavy ions in a 28-nm SRAM-based FPGA J Tonfat, FL Kastensmidt, L Artola, G Hubert, NH Medina, N Added, ... IEEE Transactions on Nuclear Science 64 (8), 2161-2168, 2017 | 39 | 2017 |
| Method to analyze the susceptibility of HLS designs in SRAM-based FPGAs under soft errors J Tonfat, L Tambara, A Santos, F Kastensmidt International Symposium on Applied Reconfigurable Computing, 132-143, 2016 | 32 | 2016 |
| Voltage scaling and aging effects on soft error rate in SRAM-based FPGAs FL Kastensmidt, J Tonfat, T Both, P Rech, G Wirth, R Reis, F Bruguier, ... Microelectronics Reliability 54 (9-10), 2344-2348, 2014 | 29 | 2014 |
| Multiple fault injection platform for SRAM-based FPGA based on ground-level radiation experiments J Tarrillo, J Tonfat, L Tambara, FL Kastensmidt, R Reis 2015 16th Latin-American Test Symposium (LATS), 1-6, 2015 | 28 | 2015 |
| Energy efficient frame-level redundancy scrubbing technique for SRAM-based FPGAs J Tonfat, F Kastensmidt, R Reis 2015 NASA/ESA Conference on Adaptive Hardware and Systems (AHS), 1-8, 2015 | 24 | 2015 |
| Analyzing reliability and performance trade-offs of HLS-based designs in SRAM-based FPGAs under soft errors LA Tambara, J Tonfat, A Santos, FL Kastensmidt, NH Medina, N Added, ... IEEE Transactions on Nuclear Science 64 (2), 874-881, 2017 | 22 | 2017 |
| Applying TMR in hardware accelerators generated by high-level synthesis design flow for mitigating multiple bit upsets in SRAM-based FPGAs AF dos Santos, LA Tambara, F Benevenuti, J Tonfat, FL Kastensmidt Applied Reconfigurable Computing: 13th International Symposium, ARC 2017 …, 2017 | 18 | 2017 |
| Analyzing the influence of the angles of incidence on SEU and MBU events induced by low LET heavy ions in a 28-nm SRAM-based FPGA J Tonfat, FL Kastensmidt, L Artola, G Hubert, NH Medina, N Added, ... 2016 16th European Conference on Radiation and Its Effects on Components and …, 2016 | 14 | 2016 |
| Analyzing the influence of voltage scaling for soft errors in SRAM-based FPGAs J Tonfat, JR Azambuja, G Nazar, P Rech, C Frost, FL Kastensmidt, ... 2013 14th European Conference on Radiation and Its Effects on Components and …, 2013 | 11 | 2013 |
| Leakage current analysis in static CMOS logic gates for a transistor network design approach J Tonfat, G Flach, R Reis 2016 26th International Workshop on Power and Timing Modeling, Optimization …, 2016 | 10 | 2016 |
| Soft error rate in SRAM-based FPGAs under neutron-induced and TID effects LA Tambara, JL Tonfat, R Reis, FL Kastensmidt, ECF Pereira, RG Vaz, ... 2014 15th latin american test workshop-latw, 1-6, 2014 | 10 | 2014 |
| SET susceptibility estimation of clock tree networks from layout extraction R Chipana, FL Kastensmidt, J Tonfat, R Reis 2012 13th Latin American Test Workshop (LATW), 1-6, 2012 | 10 | 2012 |
| Design and verification of a layer-2 Ethernet MAC classification engine for a Gigabit Ethernet switch J Tonfat, R Reis 2010 17th IEEE International Conference on Electronics, Circuits and Systems …, 2010 | 10 | 2010 |
| Experimental applications on SRAM-based FPGA for the NanosatC-BR2 scientific mission F Benevenuti, E Chielle, J Tonfat, L Tambara, FL Kastensmidt, CA Zaffari, ... 2019 IEEE International Parallel and Distributed Processing Symposium …, 2019 | 8 | 2019 |
Fernanda Lima KastensmidtProfessor de Ciência da Computação, Universidade Federal do Rio Grande do SulDirección de correo verificada de inf.ufrgs.br
