Javier Olivito
Javier Olivito
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An initial specific processor for sudoku solving
C González, J Olivito, J Resano
2009 International Conference on Field-Programmable Technology, 530-533, 2009
72009
FPGA implementation of a strong Reversi player
J Olivito, C González, J Resano
2010 International Conference on Field-Programmable Technology, 507-510, 2010
62010
Accelerating board games through Hardware/Software Codesign
J Olivito, J Resano, JL Briz
IEEE Transactions on Computational Intelligence and AI in Games 9 (4), 393-401, 2016
42016
Performance and energy efficiency analysis of a Reversi player for FPGAs and General Purpose Processors
J Olivito, R Gran, J Resano, C González, E Torres
Microprocessors and Microsystems 39 (2), 64-73, 2015
32015
An FPGA-based specific processor for Blokus Duo
J Olivito, C González, J Resano
2013 International Conference on Field-Programmable Technology (FPT), 502-505, 2013
22013
Analysis of a Pipelined Architecture for Sparse DNNs on Embedded Systems
AA Moreno, J Olivito, J Resano, H Mecha
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 28 (9 …, 2020
2020
An Efficient Hardware Accelerator to Handle Compressed Filters and Avoid Useless Operations in CNNs
AA Moreno, J Olivito, J Resano
Jornada de Jóvenes Investigadores del I3A 6, 2018
2018
Analysis of the reconfiguration latency and energy overheads for a Xilinx Virtex-5 field-programmable gate array
J Olivito, F Serrano, JA Clemente, H Mecha, J Resano
IET Computers & Digital Techniques 12 (4), 150-157, 2018
2018
An improved FPGA-based specific processor for Blokus Duo
J Olivito, A Delmás, J Resano
2014 International Conference on Field-Programmable Technology (FPT), 366-369, 2014
2014
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Artículos 1–9