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Pablo Abad
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Rotary router: an efficient architecture for CMP interconnection networks
P Abad, V Puente, JA Gregorio, P Prieto
Proceedings of the 34th annual international symposium on Computer …, 2007
1232007
Topaz: An open-source interconnection network simulator for chip multiprocessors and supercomputers
P Abad, P Prieto, LG Menezo, A Colaso, V Puente, JÁ Gregorio
Networks on Chip (NoCS), 2012 Sixth IEEE/ACM International Symposium on, 99-106, 2012
1142012
MRR: Enabling fully adaptive multicast routing for CMP interconnection networks
P Abad, V Puente, JA Gregorio
2009 IEEE 15th International Symposium on High Performance Computer …, 2009
772009
LIGERO: a light but efficient router conceived for cache-coherent chip multiprocessors
P Abad, V Puente, JA Gregorio
ACM Transactions on Architecture and Code Optimization (TACO) 9 (4), 1-21, 2013
142013
AC-WAR: Architecting the Cache Hierarchy to Improve the Lifetime of an Non-volatile Endurance-limited Main Memory
P Abad, P Prieto, V Puente, JA Gregorio
Transactions on Parallel and Distributed Systems, 2015
102015
Balancing performance and cost in CMP interconnection networks
P Abad, V Puente, JA Gregorio
IEEE Transactions on Parallel and Distributed Systems 23 (3), 452-459, 2012
102012
Reducing the interconnection network cost of chip multiprocessors
P Abad, V Puente, JÁ Gregorio
Second ACM/IEEE International Symposium on Networks-on-Chip (nocs 2008), 183-192, 2008
102008
Architecting Racetrack Memory Preshift through Pattern-Based Prediction Mechanisms
A Colaso, P Prieto, P Abad, JA Gregorio, V Puente
2019 IEEE International Parallel and Distributed Processing Symposium (IPDPS …, 2019
92019
Memory Hierarchy Characterization of NoSQL Applications through Full-System Simulation
A Colaso, P Prieto, JA Herrero, P Abad, LG Menezo, V Puente, ...
IEEE Transactions on Parallel and Distributed Systems 29 (5), 1161-1173, 2018
82018
Top-Down Performance Profiling on NVIDIA's GPUs
A Saiz, P Prieto, P Abad, JA Gregorio, V Puente
2022 IEEE International Parallel and Distributed Processing Symposium (IPDPS …, 2022
62022
Improving Last Level Shared Cache Performance through Mobile Insertion Policies (MIP)
P Abad, P Prieto, V Puente, JA Gregorio
Parallel Computing 49 (C), 13-27, 2015
62015
Improving coherence protocol reactiveness by trading bandwidth for latency
LG Menezo, V Puente, P Abad, JÁ Gregorio
Proceedings of the 9th conference on Computing Frontiers, 143-152, 2012
52012
Adaptive-Tree Multicast: Efficient Multi-destination Support for CMP Communication Substrate
P Abad, V Puente, L Menezo, J Gregorio
IEEE, 2012
52012
Fast, accurate processor evaluation through heterogeneous, sample-based benchmarking
P Prieto, P Abad, JA Gregorio, V Puente
IEEE Transactions on Parallel and Distributed Systems 32 (12), 2983-2995, 2021
32021
SPECcast: A methodology for fast performance evaluation with SPEC CPU 2017 multiprogrammed workloads
P Prieto, P Abad, JA Herrero, JA Gregorio, V Puente
Proceedings of the 49th International Conference on Parallel Processing, 1-11, 2020
32020
Interaction of NoC design and Coherence Protocol in 3D-stacked CMPs
P Abad, P Prieto, LG Menezo, A Colaso, V Puente, JA Gregorio
16th Euromicro Conference on Digital System Design, 48-55, 2013
22013
Accuracy vs. Computational Cost Tradeoff in Distributed Computer System Simulation
A Colaso, P Prieto, JA Herrero, P Abad, V Puente, JA Gregorio
arXiv preprint arXiv:1902.02837, 2019
12019
BIXBAR: A low cost solution to support dynamic link reconfiguration in networks on chip
P Abad, P Prieto, V Puente, JA Gregorio
2012 IEEE 30th International Conference on Computer Design (ICCD), 55-60, 2012
12012
Impact of Interconnection Network resources on CMP performance
P Abad, P Prieto, J Merino, LG Menezo, V Puente
Fourth Workshop on Interconnection Network Architectures: On-Chip, Multi …, 2010
12010
Performance Characterization of Popular DNN Models on Out-of-Order CPUs
P Prieto, P Abad, JA Gregorio, V Puente
2023 32nd International Conference on Parallel Architectures and Compilation …, 2023
2023
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