Nilanka Rajapaksha
Nilanka Rajapaksha
Student
Dirección de correo verificada de zips.uakron.edu
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Año
Low-Power VLSI Architectures for DCT\/DWT: Precision vs Approximation for HD Video, Biomedical, and Smart Antenna Applications
A Madanayake, RJ Cintra, V Dimitrov, F Bayer, KA Wahid, S Kulasekera, ...
IEEE Circuits and Systems Magazine 15 (1), 25-47, 2015
492015
Multiplier-free DCT approximations for RF multi-beam digital aperture-array space imaging and directional sensing
US Potluri, A Madanayake, RJ Cintra, FM Bayer, N Rajapaksha
Measurement Science and Technology 23 (11), 114003, 2012
492012
A Row-Parallel 88 2-D DCT Architecture Using Algebraic Integer-Based Exact Computation
A Madanayake, RJ Cintra, D Onen, VS Dimitrov, N Rajapaksha, LT Bruton, ...
IEEE transactions on circuits and systems for video technology 22 (6), 915-929, 2011
432011
2D space–time wave-digital multi-fan filter banks for signals consisting of multiple plane waves
N Rajapaksha, A Madanayake, LT Bruton
Multidimensional Systems and Signal Processing 25 (1), 17-39, 2014
392014
A Single-Channel Architecture for Algebraic Integer-Based 88 2-D DCT Computation
A Edirisuriya, A Madanayake, RJ Cintra, VS Dimitrov, N Rajapaksha
IEEE transactions on circuits and systems for video technology 23 (12), 2083 …, 2013
212013
Asynchronous realization of algebraic integer-based 2D DCT using Achronix Speedster SPD60 FPGA
N Rajapaksha, A Edirisuriya, A Madanayake, RJ Cintra, D Onen, I Amer, ...
Journal of Electrical and Computer Engineering 2013, 2013
142013
DFT Computation using Gauss-Eisenstein Basis: FFT Algorithms and VLSI Architectures
DFG Coelho, RJ Cintra, N Rajapaksha, GJ Mendis, A Madanayake, ...
IEEE Transactions on Computers 66 (8), 1442-1448, 2017
82017
VLSI computational architectures for the arithmetic cosine transform
N Rajapaksha, A Madanayake, RJ Cintra, J Adikari, VS Dimitrov
IEEE Transactions on Computers 64 (9), 2708-2715, 2014
42014
A new class of spatially-discrete time-continuous 2D IIR filters based on wave-digital-filter theory
A Madanayake, N Rajapaksha, C Wijenayake, KS Lee, LT Bruton, ...
Proceedings of 2011 IEEE Pacific Rim Conference on Communications, Computers …, 2011
42011
Systolic array architecture for steerable multibeam VHF wave-digital RF apertures
N Rajapaksha, A Madanayake, LT Bruton
IEEE Transactions on Aerospace and Electronic Systems 51 (1), 669-687, 2015
32015
Raster-scanned wave-digital filter architectures for multi-beam 2d iir broadband beamforming
NT Rajapaksha, C Wijenayake, A Madanayake, LT Bruton
2010 International Conference on Microelectronics, 112-115, 2010
32010
Asynchronous-QDI 2D IIR digital filter circuits
NT Rajapaksha, A Madanayake
2011 IEEE International Symposium of Circuits and Systems (ISCAS), 665-668, 2011
22011
Towards RF analog IC realization of wave-discrete filters on 65nm CMOS
N Rajapaksha, A Madanayake, KS Lee, A Edirisuriya, L Bruton, ...
2012 IEEE 27th Convention of Electrical and Electronics Engineers in Israel, 1-5, 2012
12012
Fast FPGA-architecture for fan/beam-steering in wave-digital RF aperture arrays
S Wijayaratna, N Rajapaksha, A Madanayake, LT Bruton
Multidimensional Systems and Signal Processing 28 (2), 771-789, 2017
2017
Wave-digital Filter Based Circuits for Beamforming and RF-FPGAs
NT Rajapaksha
University of Akron, 2015
2015
An asynchronous array architecture for 16× 1 DCT-4/DST-4 on a 65nm Achronix SPD60 FPGA
A Madanayake, D Mugler, N Rajapaksha
2011 IEEE 54th International Midwest Symposium on Circuits and Systems …, 2011
2011
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Artículos 1–16