Julien Sebot
Julien Sebot
Microprocessor Architect, Intel
Verified email at intel.com
TitleCited byYear
Adaptive insertion policies for managing shared caches
A Jaleel, W Hasenplaugh, M Qureshi, J Sebot, S Steely Jr, J Emer
Proceedings of the 17th international conference on Parallel architectures …, 2008
3552008
Method and apparatus for parallel shift right merge of data
J Sebot, WW Macy, E Debes, HV Nguyen
US Patent 7,272,622, 2007
1042007
Fast full search motion estimation with SIMD merge instruction
J Sebot, WW Macy, E Debes
US Patent 7,685,212, 2010
562010
Improving 3D geometry transformations on a simultaneous multithreaded SIMD processor
C Limousin, J Sebot, A Vartanian, N Drach-Temam
Proceedings of the 15th international conference on Supercomputing, 236-245, 2001
252001
Processor to execute shift right merge instructions
J Sebot, WW Macy Jr, EL Debes, HV Nguyen
US Patent App. 16/208,534, 2019
20*2019
Memory bandwidth: The true bottleneck of SIMD multimedia performance on a superscalar processor
J Sebot, N Drach-Temam
European Conference on Parallel Processing, 439-447, 2001
192001
Bitstream buffer manipulation with a SIMD merge instruction
YK Chen, WW Macy Jr, M Holliman, EL Debes, MM Yeung, HV Nguyen, ...
US Patent 9,182,988, 2015
162015
Method and apparatus for performing horizontal addition and subtraction
WW Macy, E Debes, MJ Buxton, P Roussel, J Sebot, HV Nguyen
US Patent 7,395,302, 2008
112008
SIMD extensions: reducing power consumption on a superscalar processor for multimedia applications
J Sebot, N Drach
Cool Chips IV, 2001
102001
Apparatus and method for determining the number of execution cores to keep active in a processor
AN Ananthakrishnan, JF Sebot, JD Schwartz, SH Gunther, EC Samson
US Patent 9,037,889, 2015
92015
A performance evaluation of multimedia kernels using altivec streaming simd extensions
J Sebot, N Drach-Temam
Sixth International Symposium on High Performance Computer Architecture …, 2000
72000
Architecture optimization for multimedia application exploiting data and thread-level parallelism
C Limousin, J Sebot, A Vartanian, N Drach
Journal of Systems Architecture 51 (1), 15-27, 2005
62005
S., AND EMER, J. 2008. Adaptive insertion policies for managing shared caches
A JALEEL, W HASENPLAUGH, M QURESHI, J SEBOT, JR STEELY
PACT ‘08: Proceedings of the 17th International Conference on Parallel …, 0
5
Post-silicon CPU adaptation made practical using machine learning
SJ Tarsa, RBR Chowdhury, J Sebot, G Chinya, J Gaur, ...
Proceedings of the 46th International Symposium on Computer Architecture, 14-26, 2019
32019
Impact des extensions SIMD sur les performances d'applications multimedias. La bande passante memoire limite AltiVec
J Sebot
TSI-Technique et Science Informatiques-RAIRO 21 (2), 183-202, 2002
32002
Mitigating branch prediction and other timing based side channel attacks
J Sebot, S Gueron
US Patent 8,869,294, 2014
12014
SIMD ISA extensions: Power efficiency on multimedia on a superscalar processor
J SEBOT, N DRACH
IEICE transactions on electronics 85 (2), 297-303, 2002
12002
Dsp, image processing and 3d performance on a general purpose microprocessor using simd isa extensions
J Sébot
LRI Report, University of Paris XI, 2000
12000
Apparatus and Method for Determining the Number of Execution Units to Keep Active in a Processor
AN Ananthakrishnan, J Sebot, JD Schwartz, SH Gunther, EC Samson
US Patent App. 14/697,553, 2015
2015
Intel Architecture Software Developement Manual, with Preliminary Willamette Architecture Intel Architecture Software Developement Manual, with Preliminary Willamette …
J SEBOT, N DRACH
IEICE transactions on electronics 85 (2), 297-303, 2002
2002
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