| Task superscalar: An out-of-order task pipeline Y Etsion, F Cabarcas, A Rico, A Ramirez, RM Badia, E Ayguade, ... Proceedings of the 2010 43rd Annual IEEE/ACM International Symposium on …, 2010 | 123 | 2010 |
| Tibidabo: Making the case for an ARM-based HPC system N Rajovic, A Rico, N Puzovic, C Adeniyi-Jones, A Ramirez Future Generation Computer Systems 36, 322-334, 2014 | 121 | 2014 |
| Trace-driven simulation of multithreaded applications A Rico, A Duran, F Cabarcas, Y Etsion, A Ramirez, M Valero (IEEE ISPASS) IEEE International Symposium on Performance Analysis of …, 2011 | 70 | 2011 |
| On the simulation of large-scale architectures using multiple application abstraction levels A Rico, F Cabarcas, C Villavieja, M Pavlovic, A Vega, Y Etsion, A Ramirez, ... ACM Transactions on Architecture and Code Optimization (TACO) 8 (4), 36, 2012 | 59 | 2012 |
| The mont-blanc prototype: An alternative approach for hpc systems N Rajovic, A Rico, F Mantovani, D Ruiz, JO Vilarrubi, C Gomez, L Backes, ... SC'16: Proceedings of the International Conference for High Performance …, 2016 | 57 | 2016 |
| Criticality-aware dynamic task scheduling for heterogeneous architectures K Chronaki, A Rico, RM Badia, E Ayguadé, J Labarta, M Valero Proceedings of the 29th ACM on International Conference on Supercomputing …, 2015 | 53 | 2015 |
| Experiences with mobile processors for energy efficient HPC N Rajovic, A Rico, J Vipond, I Gelado, N Puzovic, A Ramirez 2013 Design, Automation & Test in Europe Conference & Exhibition (DATE), 464-468, 2013 | 50 | 2013 |
| The ARM Scalable Vector Extension N Stephens, S Biles, M Boettcher, J Eapen, M Eyole, G Gabrielli, ... IEEE Micro 37 (2), 26-39, 2017 | 40 | 2017 |
| Task Scheduling Techniques for Asymmetric Multi-core Systems K Chronaki, A Rico, M Casas, M Moretó, RM Badia, E Ayguadé, J Labarta, ... IEEE Transactions on Parallel and Distributed Systems 28 (7), 2074-2087, 2017 | 26 | 2017 |
| Scalable simulation of decoupled accelerator architectures A Rico, F Cabarcas, A Quesada, M Pavlovic, AJ Vega, C Villavieja, ... Universitat Politecnica de Catalunya, Tech. Rep. UPC-DACRR-2010-14, 2010 | 25 | 2010 |
| Available task-level parallelism on the Cell BE A Rico, A Ramirez, M Valero Scientific Programming 17 (1-2), 59-76, 2009 | 20 | 2009 |
| MUSA: a multi-level simulation approach for next-generation HPC machines T Grass, C Allande, A Armejach, A Rico, E Ayguadé, J Labarta, M Valero, ... Proceedings of the International Conference for High Performance Computing …, 2016 | 19 | 2016 |
| Evaluating the effect of last-level cache sharing on integrated GPU-CPU systems with heterogeneous applications V García, J Gomez-Luna, T Grass, A Rico, E Ayguade, AJ Pena 2016 IEEE International Symposium on Workload Characterization (IISWC), 1-10, 2016 | 15 | 2016 |
| TaskPoint: Sampled Simulation of Task-Based Programs T Grass, A Rico, M Casas, M Moreto, E Ayguadé Performance Analysis of Systems and Software (ISPASS), 2016 IEEE …, 2016 | 12 | 2016 |
| Interleaving granularity on high bandwidth memory architecture for CMPs F Cabarcas, A Rico, Y Etsion, A Ramirez 2010 International Conference on Embedded Computer Systems: Architectures …, 2010 | 10 | 2010 |
| Experiences in speeding up computer vision applications on mobile computing platforms L Backes, A Rico, B Franke 2015 International Conference on Embedded Computer Systems: Architectures …, 2015 | 8 | 2015 |
| Micro architecture for indirect access to a register file in a processor E Barak, AR Carro, JH Derby, A Golander, O Heymann, N Levison, ... US Patent App. 13/323,933, 2013 | 8 | 2013 |
| ARM HPC Ecosystem and the Reemergence of Vectors A Rico, JA Joao, C Adeniyi-Jones, E Van Hensbergen Proceedings of the Computing Frontiers Conference, 329-334, 2017 | 7 | 2017 |
| Cellsim: A validated modular heterogeneous multiprocessor simulator F Cabarcas, A Rico, D Rodenas, X Martorell, Á Ramírez, E Ayguade XVIII Jornadas de paralelismo, 181-188, 2006 | 7 | 2006 |
| Comparing last-level cache designs for CMP architectures A Vega, A Rico, F Cabarcas, A Ramirez, M Valero Proceedings of the Second International Forum on Next-Generation Multicore …, 2010 | 6 | 2010 |
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