Petar Radojković
Petar Radojković
Dirección de correo verificada de bsc.es
TítuloCitado porAño
On the evaluation of the impact of shared resources in multithreaded COTS processors in time-critical environments
P Radojković, S Girbal, A Grasset, E Quiñones, S Yehia, FJ Cazorla
ACM Transactions on Architecture and Code Optimization (TACO) 8 (4), 34, 2012
832012
Energy efficient hpc on embedded socs: Optimization techniques for mali gpu
I Grasso, P Radojkovic, N Rajovic, I Gelado, A Ramirez
2014 IEEE 28th International parallel and distributed processing symposium …, 2014
512014
Optimal task assignment in multithreaded processors: a statistical approach
P Radojković, V Čakarević, M Moretó, J Verdú, A Pajuelo, FJ Cazorla, ...
Proceedings of the seventeenth international conference on Architectural …, 2012
432012
Another trip to the wall: How much will stacked dram benefit hpc?
M Radulovic, D Zivanovic, D Ruiz, BR de Supinski, SA McKee, ...
Proceedings of the 2015 International Symposium on Memory Systems, 31-36, 2015
382015
Characterizing the resource-sharing levels in the UltraSPARC T2 processor
V Čakarević, P Radojković, J Verdú, A Pajuelo, FJ Cazorla, M Nemirovsky, ...
2009 42nd Annual IEEE/ACM International Symposium on Microarchitecture …, 2009
332009
Thread assignment of multithreaded network applications in multicore/multithreaded processors
P Radojkovic, V Cakarevic, J Verdu, A Pajuelo, FJ Cazorla, M Nemirovsky, ...
IEEE Transactions on Parallel and Distributed Systems 24 (12), 2513-2525, 2012
242012
Measuring operating system overhead on CMT processors
P Radojkovic, V Cakarevic, J Verdú, A Pajuelo, R Gioiosa, FJ Cazorla, ...
Computer Architecture and High Performance Computing, 2008. SBAC-PAD'08 …, 2008
132008
Main memory in HPC: do we need more or could we live with less?
D Zivanovic, M Pavlovic, M Radulovic, H Shin, J Son, SA Mckee, ...
ACM Transactions on Architecture and Code Optimization (TACO) 14 (1), 3, 2017
122017
Performance Impact of a Slower Main Memory: A case study of STT-MRAM in HPC
K Asifuzzaman, M Pavlovic, M Radulovic, D Zaragoza, O Kwon, KC Ryoo, ...
Proceedings of the Second International Symposium on Memory Systems, 40-49, 2016
122016
Thread to strand binding of parallel network applications in massive multi-threaded systems
P Radojković, V Čakarević, J Verdú, A Pajuelo, FJ Cazorla, M Nemirovsky, ...
15th ACM SIGPLAN Symposium on Principles and Practice of Parallel …, 2010
112010
Paving the way towards a highly energy-efficient and highly integrated compute node for the Exascale revolution: the ExaNoDe approach
A Rigo, C Pinto, K Pouget, D Raho, D Dutoit, PY Martinez, C Doran, ...
2017 Euromicro Conference on Digital System Design (DSD), 486-493, 2017
102017
Thread assignment in multicore/multithreaded processors: a statistical approach
P Radojković, PM Carpenter, M Moreto, V Čakarević, J Verdu, A Pajuelo, ...
IEEE Transactions on Computers 65 (1), 256-269, 2015
92015
Limpio-LIghtweight MPI instrumentatiOn
M Pavlovic, M Radulovic, A Ramirez, P Radojkovic
2015 IEEE 23rd International Conference on Program Comprehension, 303-306, 2015
72015
Large-memory nodes for energy efficient high-performance computing
D Zivanovic, M Radulovic, G Llort, D Zaragoza, J Strassburg, ...
Proceedings of the Second International Symposium on Memory Systems, 3-9, 2016
62016
Main memory latency simulation: the missing link
RS Verdejo, K Asifuzzaman, M Radulovic, P Radojković, E Ayguadé, ...
Proceedings of the International Symposium on Memory Systems, 107-116, 2018
52018
Enabling a reliable STT-MRAM main memory simulation
K Asifuzzaman, RS Verdejo, P Radojković
Proceedings of the International Symposium on Memory Systems, 283-292, 2017
42017
Microbenchmarks for Detailed Validation and Tuning of Hardware Simulators
RS Verdejo, P Radojković
2017 International Conference on High Performance Computing & Simulation …, 2017
42017
Kernel Partitioning of Streaming Applications: A Statistical Approach to an NP-complete Problem
P Radojkovic, PM Carpenter, M Moretó, A Ramirez, FJ Cazorla
45th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO), 2012, 2012
42012
HPC benchmarking: scaling right and looking beyond the average
M Radulovic, K Asifuzzaman, P Carpenter, P Radojković, E Ayguadé
European Conference on Parallel Processing, 135-146, 2018
12018
Understanding the overhead of the spin-lock loop in CMT architectures
V Cakarevic, P Radojkovic, J Verdú Mulà, MA Pajuelo González, ...
12011
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