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Petar Radojković
Petar Radojković
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On the evaluation of the impact of shared resources in multithreaded COTS processors in time-critical environments
P Radojković, S Girbal, A Grasset, E Quiñones, S Yehia, FJ Cazorla
ACM Transactions on Architecture and Code Optimization (TACO) 8 (4), 1-25, 2012
1192012
Energy efficient hpc on embedded socs: Optimization techniques for mali gpu
I Grasso, P Radojkovic, N Rajovic, I Gelado, A Ramirez
2014 IEEE 28th International parallel and distributed processing symposium …, 2014
692014
Another trip to the wall: How much will stacked dram benefit hpc?
M Radulovic, D Zivanovic, D Ruiz, BR de Supinski, SA McKee, ...
Proceedings of the 2015 International Symposium on Memory Systems, 31-36, 2015
602015
Optimal task assignment in multithreaded processors: a statistical approach
P Radojković, V Čakarević, M Moretó, J Verdú, A Pajuelo, FJ Cazorla, ...
Proceedings of the seventeenth international conference on Architectural …, 2012
582012
Main memory in HPC: Do we need more or could we live with less?
D Zivanovic, M Pavlovic, M Radulovic, H Shin, J Son, SA Mckee, ...
ACM Transactions on Architecture and Code Optimization (TACO) 14 (1), 1-26, 2017
542017
Characterizing the resource-sharing levels in the UltraSPARC T2 processor
V Čakarević, P Radojković, J Verdú, A Pajuelo, FJ Cazorla, M Nemirovsky, ...
Proceedings of the 42nd Annual IEEE/ACM International Symposium on …, 2009
362009
Paving the way towards a highly energy-efficient and highly integrated compute node for the Exascale revolution: the ExaNoDe approach
A Rigo, C Pinto, K Pouget, D Raho, D Dutoit, PY Martinez, C Doran, ...
2017 Euromicro Conference on Digital System Design (DSD), 486-493, 2017
342017
Thread assignment of multithreaded network applications in multicore/multithreaded processors
P Radojkovic, V Cakarevic, J Verdú, A Pajuelo, FJ Cazorla, M Nemirovsky, ...
IEEE Transactions on Parallel and Distributed Systems 24 (12), 2513-2525, 2012
292012
Thread assignment in multicore/multithreaded processors: a statistical approach
P Radojković, PM Carpenter, M Moretó, V Čakarević, J Verdu, A Pajuelo, ...
IEEE Transactions on Computers 65 (1), 256-269, 2015
262015
Enabling a reliable STT-MRAM main memory simulation
K Asifuzzaman, RS Verdejo, P Radojković
Proceedings of the International Symposium on Memory Systems, 283-292, 2017
222017
Cost-aware prediction of uncorrected DRAM errors in the field
I Boixaderas, D Zivanovic, S Moré, J Bartolome, D Vicente, M Casas, ...
SC20: International Conference for High Performance Computing, Networking …, 2020
212020
Performance Impact of a Slower Main Memory: A case study of STT-MRAM in HPC
K Asifuzzaman, M Pavlovic, M Radulovic, D Zaragoza, O Kwon, KC Ryoo, ...
Proceedings of the Second International Symposium on Memory Systems, 40-49, 2016
182016
Measuring operating system overhead on CMT processors
P Radojkovic, V Cakarevic, J Verdú, A Pajuelo, R Gioiosa, FJ Cazorla, ...
Computer Architecture and High Performance Computing, 2008. SBAC-PAD'08 …, 2008
172008
Rethinking cycle accurate DRAM simulation
S Li, RS Verdejo, P Radojković, B Jacob
Proceedings of the International Symposium on Memory Systems, 184-191, 2019
152019
Main memory latency simulation: the missing link
RS Verdejo, K Asifuzzaman, M Radulovic, P Radojković, E Ayguadé, ...
Proceedings of the International Symposium on Memory Systems, 107-116, 2018
152018
DRAM errors in the field: A statistical approach
D Zivanovic, PE Dokht, S Moré, J Bartolome, PM Carpenter, P Radojković, ...
Proceedings of the International Symposium on Memory Systems, 69-84, 2019
112019
Thread to strand binding of parallel network applications in massive multi-threaded systems
P Radojković, V Čakarević, J Verdú, A Pajuelo, FJ Cazorla, M Nemirovsky, ...
15th ACM SIGPLAN Symposium on Principles and Practice of Parallel …, 2010
112010
PROFET: Modeling system performance and energy without simulating the CPU
M Radulovic, R Sánchez Verdejo, P Carpenter, P Radojković, B Jacob, ...
Proceedings of the ACM on Measurement and Analysis of Computing Systems 3 (2 …, 2019
102019
Towards resilient EU HPC systems: A blueprint
P Radojkovic, M Marazakis, P Carpenter, R Jeyapaul, D Gizopoulos, ...
European HPC resilience initiative, 2020
92020
Large-memory nodes for energy efficient high-performance computing
D Zivanovic, M Radulovic, G Llort, D Zaragoza, J Strassburg, ...
Proceedings of the Second International Symposium on Memory Systems, 3-9, 2016
82016
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