| A 64 Gb/s low-power transceiver for short-reach PAM-4 electrical links in 28-nm FDSOI CMOS E Depaoli, H Zhang, M Mazzini, W Audoglio, AA Rossi, G Albasini, ... IEEE Journal of Solid-State Circuits 54 (1), 6-17, 2018 | 65 | 2018 |
| A 4.9 pJ/b 16-to-64Gb/s PAM-4 VSR transceiver in 28nm FDSOI CMOS E Depaoli, E Monaco, G Steffan, M Mazzini, H Zhang, W Audoglio, ... 2018 IEEE International Solid-State Circuits Conference-(ISSCC), 112-114, 2018 | 43 | 2018 |
| A 112 Gb/s PAM-4 RX front-end with unclocked decision feedback equalizer I Petricli, H Zhang, E Monaco, G Albasini, A Mazzanti IEEE Transactions on Circuits and Systems II: Express Briefs 68 (1), 256-260, 2020 | 10 | 2020 |
| Flexible Transversal Continuous-Time Linear Equalizer Operating up to 25Gb/s in 28nm CMOS H Zhang, E Monaco, M Bassi, A Mazzanti 2018 IEEE International Symposium on Circuits and Systems (ISCAS), 1-4, 2018 | 3 | 2018 |
| Five to 25 Gb/s continuous time linear equaliser with transversal architecture H Zhang, E Monaco, M Bassi, A Mazzanti Electronics Letters 53 (25), 1629-1630, 2017 | 2 | 2017 |
| CMOS Continuous-Time Linear Equalizers for High-Speed Serial Links H Zhang Università degli studi di Pavia, 2020 | | 2020 |
Mazzanti AndreaProfessor of Electronics at Università di PaviaDirección de correo verificada de unipv.it
