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Erica Tena-Sánchez
Erica Tena-Sánchez
PostDoc, Departamento de Tecnología Electrónica, Universidad de Sevilla
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Year
A methodology for optimized design of secure differential logic gates for DPA resistant circuits
E Tena-Sánchez, J Castro, AJ Acosta
IEEE Journal on Emerging and Selected Topics in Circuits and Systems 4 (2 …, 2014
392014
Reducing bit flipping problems in SRAM physical unclonable functions for chip identification
S Eiroa, J Castro, MC Martínez-Rodríguez, E Tena, P Brox, I Baturone
2012 19th IEEE International Conference on Electronics, Circuits, and …, 2012
362012
Embedded electronic circuits for cryptography, hardware security and true random number generation: an overview
AJ Acosta, T Addabbo, E Tena‐Sánchez
International Journal of Circuit Theory and Applications 45 (2), 145-169, 2017
302017
DPA vulnerability analysis on Trivium stream cipher using an optimized power model
E Tena-Sánchez, AJ Acosta
2015 IEEE International Symposium on Circuits and Systems (ISCAS), 1846-1849, 2015
142015
A programmable and configurable ASIC to generate piecewise-affine functions defined over general partitions
P Brox, J Castro-Ramírez, MC Martínez-Rodríguez, E Tena, CJ Jiménez, ...
IEEE Transactions on Circuits and Systems I: Regular Papers 60 (12), 3182-3194, 2013
132013
Application specific integrated circuit solution for multi‐input multi‐output piecewise‐affine functions
P Brox, MC Martínez‐Rodríguez, E Tena‐Sánchez, I Baturone, AJ Acosta
International Journal of Circuit Theory and Applications 44 (1), 4-20, 2016
62016
Optimized DPA attack on Trivium stream cipher using correlation shape distinguishers
E Tena-Sánchez, AJ Acosta
2015 Conference on Design of Circuits and Integrated Systems (DCIS), 1-6, 2015
62015
Low-power differential logic gates for DPA resistant circuits
E Tena-Sánchez, J Castro, AJ Acosta
2014 17th Euromicro Conference on Digital System Design, 671-674, 2014
62014
Projection of Dual-Rail DPA Countermeasures in Future FinFET and Emerging TFET Technologies
IM Delgado-Lozano, E Tena-Sánchez, J Núñez, AJ Acosta
ACM Journal on Emerging Technologies in Computing Systems (JETC) 16 (3), 1-16, 2020
42020
ASIC-in-the-loop methodology for verification of piecewise affine controllers
MC Martínez-Rodríguez, P Brox, J Castro, E Tena, AJ Acosta, I Baturone
2012 19th IEEE International Conference on Electronics, Circuits, and …, 2012
42012
Benchmarking of nanometer technologies for DPA-resilient DPL-based cryptocircuits
E Tena-Sánchez, IM Delgado-Lozano, J Núñez, AJ Acosta
2018 Conference on Design of Circuits and Integrated Systems (DCIS), 1-6, 2018
32018
Automatic and systematic control of experimental data measurements on ASICs
E Tena, J Castro, AJ Acosta
IMEKO TC-4 Symposium Measurements of Electrical Quantities, 114-119, 2013
32013
Design and analysis of secure emerging crypto-hardware using HyperFET devices
IM Delgado-Lozano, E Tena-Sánchez, J Núñez, AJ Acosta
IEEE Transactions on Emerging Topics in Computing, 2020
22020
Programmable ASICs for model predictive control
MC Martínez-Rodríguez, P Brox, E Tena, AJ Acosta, I Baturone
2015 IEEE International Conference on Industrial Technology (ICIT), 1593-1598, 2015
22015
Hamming-Code Based Fault Detection Design Methodology for Block Ciphers
FE Potestad-Ordóńez, E Tena-Sánchez, R Chaves, M Valencia-Barrero, ...
2020 IEEE International Symposium on Circuits and Systems (ISCAS), 1-5, 2020
12020
Logic minimization and wide fan‐in issues in DPL‐based cryptocircuits against power analysis attacks
E Tena‐Sánchez, AJ Acosta
International Journal of Circuit Theory and Applications 47 (2), 238-253, 2019
12019
Power and Energy Issues on Lightweight Cryptography
AJ Acosta, E Tena-Sánchez, CJ Jiménez, JM Mora
Journal of Low Power Electronics 13 (3), 326-337, 2017
12017
Secure cryptographic hardware implementation issues for high-performance applications
E Tena-Sánchez, AJ Acosta, J Núñez
2016 26th International Workshop on Power and Timing Modeling, Optimization …, 2016
12016
Design and test of a low-power 90nm XOR/XNOR gate for cryptographic applications
E Tena-Sánchez, J Castro, AJ Acosta
2014 24th International Workshop on Power and Timing Modeling, Optimization …, 2014
12014
Hardware Countermeasures Benchmarking against Fault Attacks
FE Potestad-Ordóñez, E Tena-Sánchez, AJ Acosta-Jiménez, ...
Applied Sciences 12 (5), 2443, 2022
2022
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