| Base-delta-immediate compression: practical data compression for on-chip caches G Pekhimenko, V Seshadri, O Mutlu, PB Gibbons, MA Kozuch, TC Mowry Proceedings of the 21st international conference on Parallel architectures …, 2012 | 458 | 2012 |
| RowClone: fast and energy-efficient in-DRAM bulk data copy and initialization V Seshadri, Y Kim, C Fallin, D Lee, R Ausavarungnirun, G Pekhimenko, ... Proceedings of the 46th Annual IEEE/ACM International Symposium on …, 2013 | 449 | 2013 |
| Mlperf inference benchmark VJ Reddi, C Cheng, D Kanter, P Mattson, G Schmuelling, CJ Wu, ... 2020 ACM/IEEE 47th Annual International Symposium on Computer Architecture …, 2020 | 354 | 2020 |
| MLPerf Training Benchmark P Mattson, C Cheng, C Coleman, G Diamos, P Micikevicius, D Patterson, ... Proceedings of Machine Learning and Systems 2020, 336-349, 2020 | 271 | 2020 |
| Adaptive-Latency DRAM: Optimizing DRAM Timing for the Common-Case D Lee, Y Kim, G Pekhimenko, S Khan, V Seshadri, K Chang, O Mutlu High Performance Computer Architecture (HPCA), 2015 IEEE 21st International …, 2015 | 239 | 2015 |
| Understanding latency variation in modern DRAM chips: Experimental characterization, analysis, and optimization KK Chang, A Kashyap, H Hassan, S Ghose, K Hsieh, D Lee, T Li, ... Proceedings of the 2016 ACM SIGMETRICS International Conference on …, 2016 | 211 | 2016 |
| Benchmarking and analyzing deep neural network training H Zhu, M Akrout, B Zheng, A Pelegris, A Jayarajan, A Phanishayee, ... 2018 IEEE International Symposium on Workload Characterization (IISWC), 88-100, 2018 | 202 | 2018 |
| Linearly compressed pages: a low-complexity, low-latency main memory compression framework G Pekhimenko, V Seshadri, Y Kim, H Xin, O Mutlu, PB Gibbons, ... Proceedings of the 46th Annual IEEE/ACM International Symposium on …, 2013 | 181 | 2013 |
| Gist: Efficient data encoding for deep neural network training A Jain, A Phanishayee, J Mars, L Tang, G Pekhimenko 2018 ACM/IEEE 45th Annual International Symposium on Computer Architecture …, 2018 | 171 | 2018 |
| Simultaneous multi-layer access: Improving 3D-stacked memory bandwidth at low cost D Lee, S Ghose, G Pekhimenko, S Khan, O Mutlu ACM Transactions on Architecture and Code Optimization (TACO) 12 (4), 1-29, 2016 | 169 | 2016 |
| ChargeCache: Reducing DRAM latency by exploiting row access locality H Hassan, G Pekhimenko, N Vijaykumar, V Seshadri, D Lee, O Ergin, ... 2016 IEEE International Symposium on High Performance Computer Architecture …, 2016 | 166 | 2016 |
| Priority-based parameter propagation for distributed DNN training A Jayarajan, J Wei, G Gibson, A Fedorova, G Pekhimenko Proceedings of Machine Learning and Systems 2019, 2019 | 151 | 2019 |
| A case for core-assisted bottleneck acceleration in GPUs: enabling flexible data compression with assist warps N Vijaykumar, G Pekhimenko, A Jog, A Bhowmick, R Ausavarungnirun, ... ACM SIGARCH Computer Architecture News 43 (3S), 41-53, 2015 | 135 | 2015 |
| SoftMC: A flexible and practical open-source infrastructure for enabling experimental DRAM studies H Hassan, N Vijaykumar, S Khan, S Ghose, K Chang, G Pekhimenko, ... 2017 IEEE International Symposium on High Performance Computer Architecture …, 2017 | 134 | 2017 |
| Design-induced latency variation in modern DRAM chips: Characterization, analysis, and latency reduction mechanisms D Lee, S Khan, L Subramanian, S Ghose, R Ausavarungnirun, ... Proceedings of the ACM on Measurement and Analysis of Computing Systems 1 (1 …, 2017 | 131 | 2017 |
| RFVP: Rollback-free value prediction with safe-to-approximate loads A Yazdanbakhsh, G Pekhimenko, B Thwaites, H Esmaeilzadeh, O Mutlu, ... ACM Transactions on Architecture and Code Optimization (TACO) 12 (4), 1-26, 2016 | 92 | 2016 |
| Shifted Hamming distance: a fast and accurate SIMD-friendly filter to accelerate alignment verification in read mapping H Xin, J Greth, J Emmons, G Pekhimenko, C Kingsford, C Alkan, O Mutlu Bioinformatics 31 (10), 1553-1560, 2015 | 89* | 2015 |
| Software automatic tuning: from concepts to state-of-the-art results RS Ken Naono, Keita Teranishi, John Cavazos Springer Science & Business Media, 2010 | 88 | 2010 |
| Exploiting compressed block size as an indicator of future reuse G Pekhimenko, T Huberty, R Cai, O Mutlu, PB Gibbons, MA Kozuch, ... High Performance Computer Architecture (HPCA), 2015 IEEE 21st International …, 2015 | 86 | 2015 |
| {StreamBox}: Modern Stream Processing on a Multicore Machine H Miao, H Park, M Jeon, G Pekhimenko, KS McKinley, FX Lin 2017 USENIX Annual Technical Conference (USENIX ATC 17), 617-629, 2017 | 85 | 2017 |
Onur MutluETH Zürich and Carnegie Mellon UniversityVerified email at inf.ethz.ch
