| Task superscalar: An out-of-order task pipeline Y Etsion, F Cabarcas, A Rico, A Ramirez, RM Badia, E Ayguade, ... 2010 43rd Annual IEEE/ACM International Symposium on Microarchitecture, 89-100, 2010 | 148 | 2010 |
| Trace-driven simulation of multithreaded applications A Rico, A Duran, F Cabarcas, Y Etsion, A Ramirez, M Valero (IEEE ISPASS) IEEE International Symposium on Performance Analysis of …, 2011 | 97 | 2011 |
| The SARC architecture A Ramirez, F Cabarcas, B Juurlink, MA Mesa, F Sanchez, A Azevedo, ... IEEE micro 30 (5), 16-29, 2010 | 74 | 2010 |
| The SARC architecture A Ramirez, F Cabarcas, B Juurlink, MA Mesa, F Sanchez, A Azevedo, ... IEEE micro 30 (5), 16-29, 2010 | 74 | 2010 |
| The SARC architecture A Ramirez, F Cabarcas, B Juurlink, MA Mesa, F Sanchez, A Azevedo, ... IEEE micro 30 (5), 16-29, 2010 | 74 | 2010 |
| On the simulation of large-scale architectures using multiple application abstraction levels A Rico Carro, F Cabarcas, C Villavieja Prados, M Pavlovic, A Vega, ... ACM transactions on architecture and code optimization 8 (4), 36: 1-36: 20, 2012 | 47 | 2012 |
| CellSs: Scheduling techniques to better exploit memory hierarchy P Bellens, JM Pérez, F Cabarcas, A Ramírez, RM Badia, J Labarta Scientific Programming 17 (1-2), 77-95, 2009 | 35 | 2009 |
| Scalable simulation of decoupled accelerator architectures A Rico, F Cabarcas, A Quesada, M Pavlovic, AJ Vega, C Villavieja, ... Universitat Politecnica de Catalunya, Tech. Rep. UPCDAC-RR-2010-14, 2010 | 26 | 2010 |
| Turbo coding of strongly nonuniform memoryless sources with unequal energy allocation and PAM signaling F Cabarcas, RD Souza, J Garcia-Frias IEEE transactions on signal processing 54 (5), 1942-1946, 2006 | 26 | 2006 |
| Approaching the Slepian–Wolf boundary using practical channel codes J Garcia-Frias, F Cabarcas Signal Processing 86 (11), 3096-3101, 2006 | 25 | 2006 |
| Approaching the Slepian–Wolf boundary using practical channel codes J Garcia-Frias, F Cabarcas Signal Processing 86 (11), 3096-3101, 2006 | 25 | 2006 |
| Approaching the Slepian–Wolf boundary using practical channel codes J Garcia-Frias, F Cabarcas Signal Processing 86 (11), 3096-3101, 2006 | 25 | 2006 |
| On the simulation of large-scale architectures using multiple application abstraction levels A Rico, F Cabarcas, C Villavieja, M Pavlovic, A Vega, Y Etsion, A Ramirez, ... ACM Transactions on Architecture and Code Optimization (TACO) 8 (4), 1-20, 2012 | 24 | 2012 |
| On the simulation of large-scale architectures using multiple application abstraction levels A Rico, F Cabarcas, C Villavieja, M Pavlovic, A Vega, Y Etsion, A Ramirez, ... ACM Transactions on Architecture and Code Optimization (TACO) 8 (4), 1-20, 2012 | 24 | 2012 |
| Approaching the Slepian-Wolf boundary using practical channel codes F CABARCAS, J GARCIA-FRIAS 2004 IEEE International Symposium on Information Theory (proceedings), 2004 | 16 | 2004 |
| Source-controlled turbo coding of nonuniform memoryless sources based on unequal energy allocation F Cabarcas, RD Souza, J Garcia-Frias International Symposium onInformation Theory, 2004. ISIT 2004. Proceedings., 166, 2004 | 15 | 2004 |
| Long DNA sequence comparison on multicore architectures F Sánchez, F Cabarcas, A Ramirez, M Valero European Conference on Parallel Processing, 247-259, 2010 | 14 | 2010 |
| Breaking the bandwidth wall in chip multiprocessors A Vega, F Cabarcas, A Ramírez, M Valero 2011 International Conference on Embedded Computer Systems: Architectures …, 2011 | 12 | 2011 |
| DMA++: on the fly data realignment for on-chip memories N Vujic, F Cabarcas, MG Tallada, A Ramirez, X Martorell, E Ayguade IEEE Transactions on Computers 61 (2), 237-250, 2010 | 11 | 2010 |
| Interleaving granularity on high bandwidth memory architecture for CMPs F Cabarcas, A Rico, Y Etsion, A Ramirez 2010 International Conference on Embedded Computer Systems: Architectures …, 2010 | 10 | 2010 |
