Felipe Cabarcas
Felipe Cabarcas
Professor of Electronic Engineering, Universidad de Antioquia
Verified email at udea.edu.co
TitleCited byYear
Task superscalar: An out-of-order task pipeline
Y Etsion, F Cabarcas, A Rico, A Ramirez, RM Badia, E Ayguade, ...
2010 43rd Annual IEEE/ACM International Symposium on Microarchitecture, 89-100, 2010
1272010
Trace-driven simulation of multithreaded applications
A Rico, A Duran, F Cabarcas, Y Etsion, A Ramirez, M Valero
(IEEE ISPASS) IEEE International Symposium on Performance Analysis of …, 2011
712011
The SARC architecture
A Ramirez, F Cabarcas, B Juurlink, MA Mesa, F Sanchez, A Azevedo, ...
IEEE micro 30 (5), 16-29, 2010
682010
The SARC architecture
A Ramirez, F Cabarcas, B Juurlink, MA Mesa, F Sanchez, A Azevedo, ...
IEEE micro 30 (5), 16-29, 2010
682010
The SARC architecture
A Ramirez, F Cabarcas, B Juurlink, MA Mesa, F Sanchez, A Azevedo, ...
IEEE micro 30 (5), 16-29, 2010
682010
On the simulation of large-scale architectures using multiple application abstraction levels
A Rico, F Cabarcas, C Villavieja, M Pavlovic, A Vega, Y Etsion, A Ramirez, ...
ACM Transactions on Architecture and Code Optimization (TACO) 8 (4), 36, 2012
602012
On the simulation of large-scale architectures using multiple application abstraction levels
A Rico, F Cabarcas, C Villavieja, M Pavlovic, A Vega, Y Etsion, A Ramirez, ...
ACM Transactions on Architecture and Code Optimization (TACO) 8 (4), 36, 2012
602012
CellSs: Scheduling techniques to better exploit memory hierarchy
P Bellens, JM Pérez, F Cabarcas, A Ramirez, RM Badia, J Labarta
Scientific Programming 17 (1-2), 77-95, 2009
332009
Turbo coding of strongly nonuniform memoryless sources with unequal energy allocation and PAM signaling
F Cabarcas, RD Souza, J Garcia-Frias
IEEE Transactions on Signal Processing 54 (5), 1942-1946, 2006
262006
Scalable simulation of decoupled accelerator architectures
A Rico, F Cabarcas, A Quesada, M Pavlovic, AJ Vega, C Villavieja, ...
Universitat Politecnica de Catalunya, Tech. Rep. UPCDAC-RR-2010-14, 2010
252010
Approaching the Slepian–Wolf boundary using practical channel codes
J Garcia-Frias, F Cabarcas
Signal Processing 86 (11), 3096-3101, 2006
222006
Approaching the Slepian–Wolf boundary using practical channel codes
J Garcia-Frias, F Cabarcas
Signal Processing 86 (11), 3096-3101, 2006
222006
Approaching the Slepian–Wolf boundary using practical channel codes
J Garcia-Frias, F Cabarcas
Signal Processing 86 (11), 3096-3101, 2006
222006
Source-controlled turbo coding of nonuniform memoryless sources based on unequal energy allocation
F Cabarcas, RD Souza, J Garcia-Frias
International Symposium onInformation Theory, 2004. ISIT 2004. Proceedings., 166, 2004
162004
Approaching the Slepian-Wolf boundary using practical channel codes
F CABARCAS, J GARCIA-FRIAS
IEEE International Symposium on Information Theory, 2004
162004
Long DNA sequence comparison on multicore architectures
F Sánchez, F Cabarcas, A Ramirez, M Valero
European Conference on Parallel Processing, 247-259, 2010
142010
Breaking the bandwidth wall in chip multiprocessors
A Vega, F Cabarcas, A Ramírez, M Valero
2011 International Conference on Embedded Computer Systems: Architectures …, 2011
102011
Interleaving granularity on high bandwidth memory architecture for CMPs
F Cabarcas, A Rico, Y Etsion, A Ramirez
2010 International Conference on Embedded Computer Systems: Architectures …, 2010
102010
DMA++: on the fly data realignment for on-chip memories
N Vujic, F Cabarcas, MG Tallada, A Ramirez, X Martorell, E Ayguade
IEEE Transactions on Computers 61 (2), 237-250, 2010
92010
Distributed source coding
Z Xiong, AD Liveris, Y Yang
Handbook on array processing and sensor networks, 609-643, 2009
92009
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Articles 1–20