Yu Pu
Yu Pu
Qualcomm Research San Diego
Verified email at qti.qualcomm.com
Title
Cited by
Cited by
Year
An ultra-low-energy multi-standard JPEG co-processor in 65 nm CMOS with sub/near threshold supply voltage
Y Pu, JP De Gyvez, H Corporaal, Y Ha
IEEE Journal of Solid-State Circuits 45 (3), 668-680, 2010
1022010
An ultra-low-energy/frame multi-standard JPEG co-processor in 65nm CMOS with sub/near-threshold power supply
Y Pu, JP de Gyvez, H Corporaal, Y Ha
2009 IEEE International Solid-State Circuits Conference-Digest of Technical …, 2009
712009
Xetal-Pro: An ultra-low energy and high throughput SIMD processor
Y He, Y Pu, R Kleihorst, Z Ye, AA Abbo, SM Londono, H Corporaal
Proceedings of the 47th Design Automation Conference, 543-548, 2010
412010
Misleading energy and performance claims in sub/near threshold digital systems
Y Pu, X Zhang, J Huang, A Muramatsu, M Nomura, K Hirairi, H Takata, ...
2010 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 625-631, 2010
342010
Curved in-plane electromechanical relay for low power logic applications
D Grogg, U Drechsler, A Knoll, U Duerig, Y Pu, C Hagleitner, M Despont
Journal of Micromechanics and Microengineering 23 (2), 025024, 2013
322013
An automated, efficient and static bit-width optimization methodology towards maximum bit-width-to-error tradeoff with affine arithmetic model
Y Pu, Y Ha
Proceedings of the 2006 Asia and South Pacific Design Automation Conference …, 2006
232006
A 9-mm2 Ultra-Low-Power Highly Integrated 28-nm CMOS SoC for Internet of Things
Y Pu, C Shi, G Samson, D Park, K Easton, R Beraha, A Newham, M Lin, ...
IEEE Journal of Solid-State Circuits 53 (3), 936-948, 2018
212018
From Xetal-II to Xetal-Pro: On the road toward an ultralow-energy and high-throughput SIMD processor
Y Pu, Y He, Z Ye, SM Londono, AA Abbo, R Kleihorst, H Corporaal
IEEE Transactions on Circuits and Systems for Video Technology 21 (4), 472-484, 2011
212011
Vt balancing and device sizing towards high yield of sub-threshold static logic gates
Y Pu, H Corporaal, Y Ha
Proceedings of the 2007 international symposium on Low power electronics and …, 2007
212007
Digital systems power management for high performance mixed signal platforms
A Kapoor, C Groot, GV Piqué, H Fatemi, J Echeverri, L Sevat, M Vertregt, ...
IEEE Transactions on Circuits and Systems I: Regular Papers 61 (4), 961-975, 2014
202014
A 1-V Input, 0.2-V to 0.47-V output switched-capacitor DC-DC converter with pulse density and width modulation (PDWM) for 57% ripple reduction
X Zhang, Y Pu, K Ishida, Y Ryu, Y Okuma, PH Chen, K Watanabe, ...
2010 IEEE Asian Solid-State Circuits Conference, 1-4, 2010
152010
Analytical compact model in Verilog-A for electrostatically actuated ohmic switches
A Bazigos, CL Ayala, M Fernandez-Bolanos, Y Pu, D Grogg, C Hagleitner, ...
IEEE Transactions on Electron Devices 61 (6), 2186-2194, 2014
132014
24% Power reduction by post-fabrication dual supply voltage control of 64 voltage domains in VDDminlimited ultra low voltage logic circuits
T Yasufuku, K Hirairi, Y Pu, YF Zheng, R Takahashi, M Sasaki, H Fuketa, ...
Thirteenth International Symposium on Quality Electronic Design (ISQED), 586-591, 2012
112012
A 1-V-input switched-capacitor voltage converter with voltage-reference-free pulse-density modulation
X Zhang, Y Pu, K Ishida, Y Ryu, Y Okuma, PH Chen, K Watanabe, ...
IEEE Transactions on Circuits and Systems II: Express Briefs 59 (6), 361-365, 2012
102012
Curved cantilever design for a robust and scalable microelectromechanical switch
D Grogg, U Drechsler, A Knoll, Y Pu, C Hagleitner, M Despont
Proc. 56th International Conference on Electron, Ion, and Photon Beam …, 2012
92012
Statistical noise margin estimation for sub-threshold combinational circuits
Y Pu, JP de Gyvez, H Corporaal, Y Ha
2008 Asia and South Pacific Design Automation Conference, 176-179, 2008
82008
Modelling NEM relays for digital circuit applications
S Rana, T Qin, D Grogg, M Despont, Y Pu, C Hagleitner, D Pamunuwa
2013 IEEE International Symposium on Circuits and Systems (ISCAS2013), 805-808, 2013
72013
Ultra-low-energy adiabatic dynamic logic circuits using nanoelectromechanical switches
CL Ayala, A Bazigos, D Grogg, Y Pu, C Hagleitner
2015 IEEE International Symposium on Circuits and Systems (ISCAS), 2596-2599, 2015
52015
NEM switch technologies for low-power logic applications
D Grogg, Y Pu, A Knoll, U Duerig, U Drechsler, C Hagleitner, M Despont
SENSORS, 2012 IEEE, 1-3, 2012
52012
A variable output voltage switched-capacitor DC-DC converter with pulse density and width modulation (PDWM) for 57% ripple reduction at low output voltage
X Zhang, Y Pu, K Ishida, Y Ryu, Y Okuma, PH Chen, T Sakurai, ...
IEICE transactions on electronics 94 (6), 953-959, 2011
42011
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Articles 1–20