| Logic-timing simulation and the degradation delay model MJ Bellido, JJ Chico, M Valencia Imperial College Press, 2005 | 33 | 2005 |
| Logic-timing simulation and the degradation delay model MJ Bellido, JJ Chico, M Valencia Imperial College Press, 2005 | 33 | 2005 |
| Characterization of normal propagation delay for delay degradation model (DDM) A Millán, J Juan, MJ Bellido, P Ruiz-de-Clavijo, D Guerrero International Workshop on Power and Timing Modeling, Optimization and …, 2002 | 16 | 2002 |
| Un ejemplo de implantación de una distribución Linux en un SoC basado en hardware libre A Muñoz, E Ostua, PR de Clavijo, MJ Bellido, J Viejo, A Millan, J Juan, ... 7th Jornadas de Computación Reconfigurable y Aplicaciones (JCRA), 85-92, 2007 | 14* | 2007 |
| Building a SoC for industrial applications based on LEON microprocessor and a GNU/Linux distribution A Muñoz, E Ostua, MJ Bellido, A Millan, J Juan, D Guerrero 2008 IEEE International Symposium on Industrial Electronics, 1727-1732, 2008 | 13 | 2008 |
| Efficient design and implementation on FPGA of a MicroBlaze peripheral for processing direct electrical networks measurements J Viejo, MJ Bellido, A Millan, E Ostua, J Juan, P Ruiz-de-Clavijo, ... 2006 International Symposium on Industrial Embedded Systems, 1-7, 2006 | 12 | 2006 |
| Design and implementation of a SNTP client on FPGA J Viejo, J Juan, MJ Bellido, E Ostua, A Millan, P Ruiz-de-Clavijo, A Munoz, ... 2008 IEEE International Symposium on Industrial Electronics, 1971-1975, 2008 | 11 | 2008 |
| Digital data processing peripheral design for an embedded application based on the Microblaze soft core E Ostua, J Viejo, MJ Bellido, A Millan, J Juan, A Muñoz Programmable Logic, 2008 4th Southern Conference on, 197-200, 2008 | 10 | 2008 |
| Internode: Internal node logic computational model A Millan, MJ Bellido, J Juan, D Guerrero, P Ruiz-de-Clavijo, E Ostua 36th Annual Simulation Symposium, 2003., 241-248, 2003 | 9 | 2003 |
| Fast hardware implementations of static P systems J Quiros, S Verlan, J Viejo, A Millan, MJ Bellido Computing and Informatics 35 (3), 687-718, 2016 | 8 | 2016 |
| Fast hardware implementations of static P systems J Quiros, S Verlan, J Viejo, A Millan, MJ Bellido Computing and Informatics 35 (3), 687-718, 2016 | 8 | 2016 |
| Diseño eficiente de un modulo FFT/IFFT sobre FPGA A Millan, MJ Bellido, J Juan, P Ruiz-de Clavijo, D Guerrero, E Ostua Proc. III Reconfigurable Computing and Applications Conference (JCRA …, 2003 | 8 | 2003 |
| Efficient design of a FFT/IFFT-64 module on ASIC A Millan, MJ Bellido, J Juan, P Ruiz-de Clavijo, D Guerrero, E Ostua, ... Proc. XI Iberchip Workshop (IWS), Salvador de Bahia (Brazil), 305-306, 2005 | 7 | 2005 |
| Integration of a characterization method for normal propagation delay into AUTODDM A Millan, J Juan, MJ Bellido, R de Clavijo, D Guerrero Proc. 17th Conference on Design of Circuits and Integrated Systems (DCIS), 93-97, 2002 | 7 | 2002 |
| Two phase alternating latches clocking scheme for CMOS sequential circuits D Guerrero, MJ Bellido, JJ Chico, A Millan, P Ruiz XVII Conference on Design of Circuits and Integrated Systems, 159-162, 2002 | 7 | 2002 |
| Long-term on-chip verification of systems with logical events scattered in time J Viejo, JI Villar, J Juan, A Millán, E Ostúa, J Quiros Microprocessors and Microsystems 36 (5), 402-408, 2012 | 5 | 2012 |
| Fast-convergence microsecond-accurate clock discipline algorithm for hardware implementation J Viejo, J Juan, MJ Bellido, A Millán, P Ruiz-de-Clavijo IEEE Transactions on Instrumentation and Measurement 60 (12), 3961-3963, 2011 | 5 | 2011 |
| Design of a FFT/IFFT module as an IP core suitable for embedded systems J Viejo, A Millán, MJ Bellido, J Juan, P Ruiz-de-Clavijo, D Guerrero, ... 2007 International Symposium on Industrial Embedded Systems, 337-340, 2007 | 5 | 2007 |
| Application of internode model to global power consumption estimation in SCMOS gates AM Calderón, MJB Díaz, J Juan-Chico, PR de Clavijo, DG Martos, ... Lecture notes in computer science 3728, 337, 2005 | 5 | 2005 |
| Reclaimed water use in industrial cooling circuits: Compatibility with TP11 biocides BG Arias, N Merayo, A Millán, C Negro Journal of Water Process Engineering 43, 102227, 2021 | 4 | 2021 |
Manuel Jesús BellidoDepartamento de Tecnología Electrónica, Universidad de SevillaVerified email at us.es
