| Nonrepeating identifiers in an address space of a non-volatile solid-state storage J Hayes, S Gupta, J Davis, B Gold, Z Tan US Patent 8,868,825, 2014 | 362 | 2014 |
| Scheduling policy for queues in a non-volatile solid-state storage J Hayes, S Gupta, J Davis, B Gold, Z Tan US Patent 8,874,836, 2014 | 271 | 2014 |
| RAMP gold: an FPGA-based architecture simulator for multiprocessors Z Tan, A Waterman, R Avizienis, Y Lee, H Cook, D Patterson, K Asanović Proceedings of the 47th Design Automation Conference, 463-468, 2010 | 176 | 2010 |
| A case for FAME: FPGA architecture model execution Z Tan, A Waterman, H Cook, S Bird, K Asanović, D Patterson Proceedings of the 37th annual international symposium on Computer …, 2010 | 115 | 2010 |
| Non-volatile RAM and flash memory in a non-volatile solid-state storage J Hayes, S Gupta, J Davis, B Gold, Z Tan US Patent 9,836,245, 2017 | 102 | 2017 |
| Error recovery in a storage cluster JD Davis, J Hayes, Z Tan, H Kannan, N Miladinovic US Patent 9,495,255, 2016 | 91 | 2016 |
| Data rebuild on feedback from a queue in a non-volatile solid-state storage JD Davis, J Hayes, Z Tan, H Kannan, N Miladinovic US Patent 9,483,346, 2016 | 77 | 2016 |
| Masking defective bits in a storage array JD Davis, J Hayes, Z Tan, H Kannan, N Miladinovic US Patent 9,766,972, 2017 | 65 | 2017 |
| A practical reconfigurable hardware accelerator for Boolean satisfiability solvers JD Davis, Z Tan, F Yu, L Zhang Proceedings of the 45th annual Design Automation Conference, 780-785, 2008 | 63 | 2008 |
| Failure mapping in a storage array JD Davis, J Hayes, Z Tan, H Kannan, N Miladinovic US Patent 9,558,069, 2017 | 61 | 2017 |
| Security analysis of mandatory access control model Y Jiang, C Lin, H Yin, Z Tan 2004 IEEE International Conference on Systems, Man and Cybernetics (IEEE Cat …, 2004 | 55 | 2004 |
| Approximate performance analysis of web services flow using stochastic petri net Z Tan, C Lin, H Yin, Y Hong, G Zhu Grid and Cooperative Computing-GCC 2004: Third International Conference …, 2004 | 50 | 2004 |
| Nonrepeating identifiers in an address space of a non-volatile solid-state storage J Hayes, S Gupta, J Davis, B Gold, Z Tan US Patent 10,114,757, 2018 | 42 | 2018 |
| Optimization and benchmark of cryptographic algorithms on network processors Z Tan, C Lin, H Yin, B Li IEEE Micro 24 (5), 55-69, 2004 | 41 | 2004 |
| Reconfigurable hardware accelerator for boolean satisfiability solver J Davis, Z Tan, F Yu, L Zhang US Patent 8,131,660, 2012 | 35 | 2012 |
| Designing an efficient hardware implication accelerator for SAT solving JD Davis, Z Tan, F Yu, L Zhang International Conference on Theory and Applications of Satisfiability …, 2008 | 32 | 2008 |
| Analyzing the performance and fairness of BitTorrent-like networks using a general fluid model Y Yue, C Lin, Z Tan Computer communications 29 (18), 3946-3956, 2006 | 31 | 2006 |
| DIABLO: A warehouse-scale computer network simulator using FPGAs Z Tan, Z Qian, X Chen, K Asanovic, D Patterson ACM SIGPLAN Notices 50 (4), 207-221, 2015 | 28 | 2015 |
| Adjustable error correction based on memory health in a storage unit JD Davis, J Hayes, Z Tan, H Kannan, N Miladinovic US Patent 10,983,859, 2021 | 26 | 2021 |
| Queue management for QoS provision build on network processor W Zhou, C Lin, Y Li, Z Tan The Ninth IEEE Workshop on Future Trends of Distributed Computing Systems …, 2003 | 23 | 2003 |
David PattersonProfessor of Computer Science, UC BerkeleyCorreu electrònic verificat a cs.berkeley.edu
