Sriram Aananthakrishnan
Sriram Aananthakrishnan
Verified email at intel.com
Title
Cited by
Cited by
Year
A scalable and distributed dynamic formal verifier for MPI programs
A Vo, S Aananthakrishnan, G Gopalakrishnan, BR De Supinski, M Schulz, ...
SC'10: Proceedings of the 2010 ACM/IEEE International Conference for High …, 2010
1072010
Hybrid approach for data-flow analysis of MPI programs
S Aananthakrishnan, G Bronevetsky, G Gopalakrishnan
Proceedings of the 27th international ACM conference on International …, 2013
152013
Some resources for teaching concurrency
G Gopalakrishnan, Y Yang, S Vakkalanka, A Vo, S Aananthakrishnan, ...
Proceedings of the 7th Workshop on Parallel and Distributed Systems: Testing …, 2009
52009
Compositional dataflow via abstract transition systems
G Bronevetsky, M Burke, S Aananthakrishnan, J Zhao, V Sarkar
Lawrence Livermore National Lab.(LLNL), Livermore, CA (United States), 2013
42013
How formal dynamic verification tools facilitate novel concurrency visualizations
S Aananthakrishnan, M DeLisi, S Vakkalanka, A Vo, G Gopalakrishnan, ...
European Parallel Virtual Machine/Message Passing Interface Users’ Group …, 2009
42009
ParFuse: Parallel and Compositional Analysis of Message Passing Programs
S Aananthakrishnan, G Bronevetsky, M Baranowski, G Gopalakrishnan
International Workshop on Languages and Compilers for Parallel Computing, 24-39, 2016
22016
Prune the Unnecessary: Parallel Pull-Push Louvain Algorithms with Automatic Edge Pruning
JJ Tithi, A Stasiak, S Aananthakrishnan, F Petrini
49th International Conference on Parallel Processing-ICPP, 1-11, 2020
12020
PIUMA: Programmable Integrated Unified Memory Architecture
S Aananthakrishnan, NK Ahmed, V Cave, M Cintra, Y Demir, KD Bois, ...
arXiv preprint arXiv:2010.06277, 2020
2020
Array broadcast and reduction systems and methods
J Fryman, A More, J Howard, R Pawlowski, Y Demir, N Pepperling, ...
US Patent App. 16/369,846, 2020
2020
Efficient Sparse Matrix-Vector Multiplication on Intel PIUMA Architecture
S Aananthakrishnan, R Pawlowski, J Fryman, I Hur
2020 IEEE High Performance Extreme Computing Conference (HPEC), 1-2, 2020
2020
Memory system architecture for multi-threaded processors
R Pawlowski, A More, JM Howard, JB Fryman, TC Zhong, S Smith, ...
US Patent App. 16/147,302, 2020
2020
Online and Real-time Object Tracking Algorithm with Extremely Small Matrices
JJ Tithi, S Aananthakrishnan, F Petrini
arXiv preprint arXiv:2003.12091, 2020
2020
Online and Real-time Object Tracking Algorithm with Extremely Small Matrices
J Jahan Tithi, S Aananthakrishnan, F Petrini
arXiv, arXiv: 2003.12091, 2020
2020
System, apparatus and method for barrier synchronization in a multi-threaded processor
R Pawlowski, A More, S Smith, S Pitchaimoorthy, S Jain, V Cavé, ...
US Patent App. 16/019,685, 2020
2020
A composable static analysis framework for program analysis
S Aananthakrishnan
The University of Utah, 2016
2016
Static Analysis of MPI Programs Targeting Parallel Properties
S Aananthakrishnan, G Bronevetsky, G Gopalakrishnan
Practical Formal Verification of MPI and Thread Programs
S Vakkalanka, A Vo, M DeLisi, S Aananthakrishnan, A Humphrey, ...
Build Dynamic Verifiers for Real Concurrency APIs, and Novel GUIs to Visualize Concurrency Nuances⋆
G Gopalakrishnan
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