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Ricardo Chaves
Ricardo Chaves
INESC-ID / IST, University of Lisbon
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Improving SHA-2 hardware implementations
R Chaves, G Kuzmanov, L Sousa, S Vassiliadis
Cryptographic Hardware and Embedded Systems-CHES 2006: 8th International …, 2006
1352006
A universal architecture for designing efficient modulo 2/sup n/+ 1 multipliers
L Sousa, R Chaves
IEEE Transactions on Circuits and Systems I: Regular Papers 52 (6), 1166-1178, 2005
1032005
Cost-efficient SHA hardware accelerators
R Chaves, G Kuzmanov, L Sousa, S Vassiliadis
IEEE transactions on very large scale integration (VLSI) Systems 16 (8), 999 …, 2008
942008
RDSP: A RISC DSP based on residue number system
R Chaves, L Sousa
Euromicro Symposium on Digital System Design, 2003. Proceedings., 128-135, 2003
942003
Reconfigurable memory based AES co-processor
R Chaves, G Kuzmanov, S Vassiliadis, L Sousa
Proceedings 20th IEEE International Parallel & Distributed Processing …, 2006
812006
Improving residue number system multiplication with more balanced moduli sets and enhanced modular arithmetic structures
R Chaves, L Sousa
IET Computers & Digital Techniques 1 (5), 472-480, 2007
762007
SenToy: an affective sympathetic interface
A Paiva, M Costa, R Chaves, M Piedade, D Mourão, D Sobral, K Höök, ...
International Journal of Human-Computer Studies 59 (1-2), 227-235, 2003
642003
RNS Reverse Converters for Moduli Sets With Dynamic Ranges up to-bit
H Pettenghi, R Chaves, L Sousa
IEEE Transactions on Circuits and Systems I: Regular Papers 60 (6), 1487-1500, 2012
622012
Hardware security and trust
N Sklavos, R Chaves, G Di Natale, F Regazzoni
Cham, Switzerland: Springer, 2017
592017
{2/sup n/+ 1, 2/sup n+ k/, 2/sup n/-1}: a new RNS moduli set extension
R Chaves, L Sousa
Euromicro Symposium on Digital System Design, 2004. DSD 2004., 210-217, 2004
542004
Arithmetic units for RNS moduli {2n-3} and {2n+ 3} operations
PM Matutino, R Chaves, L Sousa
2010 13th Euromicro Conference on Digital System Design: Architectures …, 2010
432010
An improved RNS reverse converter for the {22n+1−1, 2n, 2n−1} moduli set
KA Gbolagade, R Chaves, L Sousa, SD Cotofana
Proceedings of 2010 IEEE International Symposium on Circuits and Systems …, 2010
432010
Efficient FPGA implementation of the SHA-3 hash function
M Sundal, R Chaves
2017 IEEE Computer Society Annual Symposium on VLSI (ISVLSI), 86-91, 2017
422017
Towards tangibility in gameplay: building a tangible affective interface for a computer game
A Paiva, R Prada, R Chaves, M Vala, A Bullock, G Andersson, K Höök
Proceedings of the 5th international conference on Multimodal interfaces, 60-67, 2003
352003
Fantasya and sentoy
K Höök, A Bullock, A Paiva, M Vala, R Chaves, R Prada
CHI'03 Extended Abstracts on Human Factors in Computing Systems, 804-805, 2003
352003
On the Design of RNS Reverse Converters for the Four-Moduli Set ${\bf\{2^{\mmb n}+ 1, 2^{\mmb n}-1, 2^{\mmb n}, 2^{{\mmb n}+ 1}+ 1\}} $
L Sousa, S Antão, R Chaves
IEEE transactions on very large scale integration (VLSI) systems 21 (10 …, 2012
342012
Method to design general RNS reverse converters for extended moduli sets
H Pettenghi, R Chaves, L Sousa
IEEE Transactions on Circuits and Systems II: Express Briefs 60 (12), 877-881, 2013
302013
Compact CLEFIA implementation on FPGAs
P Proença, R Chaves
2011 21st International Conference on Field Programmable Logic and …, 2011
282011
Arithmetic-Based Binary-to-RNS Converter Modulofor-bit Dynamic Range
PM Matutino, R Chaves, L Sousa
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 23 (3), 603-607, 2014
232014
Sentoy: a tangible interface to control the emotions of a synthetic character
A Paiva, R Chaves, M Piedade, A Bullock, G Andersson, K Höök
Proceedings of the second international joint conference on Autonomous …, 2003
232003
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