Trevor Mudge
Trevor Mudge
Bredt Family Professor of Engineering, University of Michigan
Verified email at eecs.umich.edu - Homepage
Title
Cited by
Cited by
Year
MiBench: A free, commercially representative embedded benchmark suite
MR Guthaus, JS Ringenberg, D Ernst, TM Austin, T Mudge, RB Brown
Proceedings of the fourth annual IEEE international workshop on workload …, 2001
38812001
Razor: A low-power pipeline based on circuit-level timing speculation
D Ernst, NS Kim, S Das, S Pant, R Rao, T Pham, C Ziesler, D Blaauw, ...
Proceedings. 36th Annual IEEE/ACM International Symposium on …, 2003
14732003
Leakage current: Moore's law meets static power
NS Kim, T Austin, D Baauw, T Mudge, K Flautner, JS Hu, MJ Irwin, ...
computer 36 (12), 68-75, 2003
13982003
Drowsy caches: simple techniques for reducing leakage power
K Flautner, NS Kim, S Martin, D Blaauw, T Mudge
ACM SIGARCH Computer Architecture News 30 (2), 148-157, 2002
11122002
Near-threshold computing: Reclaiming moore's law through energy efficient integrated circuits
RG Dreslinski, M Wieckowski, D Blaauw, D Sylvester, T Mudge
Proceedings of the IEEE 98 (2), 253-266, 2010
8602010
Power: A first-class architectural design constraint
T Mudge
Computer 34 (4), 52-58, 2001
6852001
Combined dynamic voltage scaling and adaptive body biasing for lower power microprocessors under dynamic workloads
SM Martin, K Flautner, T Mudge, D Blaauw
Proceedings of the 2002 IEEE/ACM international conference on Computer-aided …, 2002
5972002
A self-tuning DVS processor using delay-error detection and correction
S Das, D Roberts, S Lee, S Pant, D Blaauw, T Austin, K Flautner, T Mudge
IEEE Journal of Solid-State Circuits 41 (4), 792-804, 2006
5132006
Razor: circuit-level correction of timing errors for low-power operation
D Ernst, S Das, S Lee, D Blaauw, T Austin, T Mudge, NS Kim, K Flautner
IEEE Micro 24 (6), 10-20, 2004
4402004
Trace-driven memory simulation: A survey
RA Uhlig, TN Mudge
ACM Computing Surveys (CSUR) 29 (2), 128-170, 1997
4211997
A survey of multicore processors
G Blake, RG Dreslinski, T Mudge
IEEE Signal Processing Magazine 26 (6), 26-37, 2009
3662009
Automatic performance setting for dynamic voltage scaling
K Flautner, S Reinhardt, T Mudge
Wireless networks 8 (5), 507-520, 2002
3452002
Improving NAND flash based disk caches
T Kgil, D Roberts, T Mudge
2008 International Symposium on Computer Architecture, 327-338, 2008
3392008
Disaggregated memory for expansion and sharing in blade servers
K Lim, J Chang, T Mudge, P Ranganathan, SK Reinhardt, TF Wenisch
ACM SIGARCH computer architecture news 37 (3), 267-278, 2009
3232009
Improving code density using compression techniques
C Lefurgy, P Bird, IC Chen, T Mudge
Proceedings of 30th Annual International Symposium on Microarchitecture, 194-203, 1997
3221997
Recognizing partially occluded parts
JL Turney, TN Mudge, RA Volz
IEEE Transactions on Pattern Analysis and Machine Intelligence, 410-421, 1985
3091985
Improving data cache performance by pre-executing instructions under a cache miss
J Dundas, T Mudge
Proceedings of the 11th international conference on Supercomputing, 68-75, 1997
3061997
The bi-mode branch predictor
CC Lee, ICK Chen, TN Mudge
Proceedings of 30th Annual International Symposium on Microarchitecture, 4-13, 1997
2991997
Soda: A low-power architecture for software radio
Y Lin, H Lee, M Woh, Y Harel, S Mahlke, T Mudge, C Chakrabarti, ...
33rd international symposium on computer architecture (ISCA'06), 89-101, 2006
2962006
Architecture of a Hypercube Supercomputer.
JP Hayes, TN Mudge, QF Stout, S Colley, J Palmer
ICPP, 653-660, 1986
2701986
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